Abstract: Calibrating automatic test equipment (ATE) includes determining an offset between a reference timing event and a channel event, where the channel event is associated with a communication channel of the ATE, and adjusting signal transmission over the communication channel based on the offset. Determining the offset may include obtaining a first time at which a reference timing signal is received at a device associated with a reference timing source, obtaining a second time at which the reference timing signal is received at a device associated with the communication channel, obtaining a third time at which a channel signal is received at the device associated with the communication channel, obtaining a fourth time at which the channel signal is received at the device associated with the reference timing source, and calculating the offset using the first time, the second time, the third time, and the fourth time.

Abstract: Calibrating automatic test equipment (ATE) includes determining an offset between a reference timing event and a channel event, where the channel event is associated with a communication channel of the ATE, and adjusting signal transmission over the communication channel based on the offset. Determining the offset may include obtaining a first time at which a reference timing signal is received at a device associated with a reference timing source, obtaining a second time at which the reference timing signal is received at a device associated with the communication channel, obtaining a third time at which a channel signal is received at the device associated with the communication channel, obtaining a fourth time at which the channel signal is received at the device associated with the reference timing source, and calculating the offset using the first time, the second time, the third time, and the fourth time.

Abstract: Automatic test equipment for testing a plurality of devices-under-test is disclosed. The equipment includes a plurality of channel modules, each of the channel modules having a plurality of channels with each channel corresponding to a pin of one of the devices-under-test. Programmable delay circuitry is coupled to each channel module. The programmable delay circuitry includes a deskew circuit adapted to be shared by more than one of the channels of the coupled channel module.