Abstract: A memory circuit receives memory modules which may vary in their size and their type. The memory circuit includes a decoder circuit which receives size feedback signals from each memory module which enables it to automatically assign each module the address space it requires. If the size of a memory module is changed, the decoder circuit reassigns the address space to accommodate the new module. Type feedback signals generated by each memory module enable the memory circuit to apply the proper control signals and enable the proper supporting circuitry when the memory module is addressed.

Abstract: A protective package for use with a printed circuit board having mounted thereon at least one semiconductive device susceptible to deleterious effects of variance of potential across the terminals of the device or the presence of static electric discharges. The package provides, in one embodiment, a single piece, insulating case supporting and enclosing the entire circuit board and its components and a shorting member having integrally formed, spring biased contact fingers in normal engagement with the termination pads of the board. The contact fingers are separable from engagement with the termination pads upon insertion of the circuit board into an edge connector. Another illustrated embodiment provides a holder or support for a shorting member which may enclose only a portion of a printed circuit board and only a portion including termination pads.

Abstract: Fault detection hardware is employed at the I/O interface racks of a programmable controller to detect fault conditions which may occur there. An I/O fault line is connected in daisy chain fashion between the I/O interface racks and the controller processor, and when a fault is indicated at any of the I/O interface racks, it is communicated to the controller processor through this line. The indicated I/O fault freezes, or holds, a microprocessor in the controller processor, and if the I/O fault persists for a preselected time interval, all operating devices connected to the programmable controller interface racks are decontrolled. A watchdog timer is also provided in the controller processor for detecting malfunction conditions which may occur at the processor. When such a condition is detected, the operating devices connected to the programmable controller interface racks are decontrolled.