Abstract: A transmitted digital VSB signal comprises a sequence of M-level symbols, where the value of M is defined by a mode control signal which is periodically multiplexed with the transmitted signal. A receiver includes an up/down counter which is reset to a zero count in response to a channel change signal and a latch responsive to the zero count of the counter for storing the next received mode control signal whose accuracy has been verified. The counter is incremented or decremented in response to each subsequently received verified mode control signal which respectively matches or does not match the stored mode control signal. Acquisition of new mode control signals is thereby relatively immune to burst noise, is effected very rapidly after a channel change and less rapidly in the absence of a channel change.

Abstract: A data frame structure for a digital information signal comprises a first fixed number of repetitive data segments each containing a second fixed number of M-level symbols representing a plurality of data bytes and a data segment sync character. The frame further includes a header segment including a frame sync code and a mode code defining the value of M for the data frame. The data frame incorporates error correction blocks and is configured to provide an integral number of data bytes and error correction blocks for each of a plurality of different values of M.

Abstract: A television receiver includes a synchronous demodulator including a bi-phase stable PLL for controlling sampling of the received signal to produce data. A phase inverter reverses the phase of the data in response to a control signal. Data segment sync characters are recovered with a sync correlation filter that also yields a sign bit indicating polarity. If the sign bit is wrong for a predetermined number of data segment sync characters, a control signal is produced to operate the phase inverter.

Abstract: An ATV system encodes variable length elementary streams of data into a multilevel symbol signal comprising a plurality of multiplexed fixed length data packets without sync information. The fixed length data packets are arranged in fields of repetitive data segments, each of which includes a data segment sync and each field of which includes a field sync. The fields of data segments are transmitted as suppressed carrier VSB modulation. In an ATV receiver, the data segment sync is used to generate a timing signal that identifies the beginning of each fixed length data packet. In one embodiment, a packet sync signal is inserted into each recovered fixed length data packet for recovering the elementary streams of data. In another embodiment, recovery of the elementary streams of data is accomplished without inserting a packet sync signal.

Abstract: A digital data processing system receives compressed variable length encoded digital data in the form of variable length codewords in contiguous variable speed Blocks of data. The boundary signals between adjacent codewords are determined and a demultiplexer sequentially sorts the serial digital data among a plurality of parallelly connected buffers for reducing the bit read speed of the buffers. A corresponding plurality of variable length decoders decodes the data from the buffers and outputs the data in parallel form to a multiplexer where it is reassembled into a serial expanded data stream. The incoming data includes selector information in fixed length headers that are separated, buffered and variable length decoded for controlling the demultiplexer. In one aspect of the invention, the data is sorted into substantially equal sized groups of integral codewords for equalizing the loading of the parallel buffers.

Abstract: A system for determining the data bits represented by the received symbols of one or more data constellations includes converting the received symbols into multi-bit values (preferably in two's complement form), selecting a number of the most significant bits of each of the multi-bit values and inverting the most significant bit thereof to derive the data bits represented by the respective symbol.

Abstract: A digital data processing system receives compressed variable length encoded digital data in the form of variable length codewords in contiguous variable speed Blocks of data. The boundary signals between adjacent codewords are determined and a demultiplexer sequentially sorts the serial digital data among a plurality of parallelly connected buffers for reducing the bit read speed of the buffers. A corresponding plurality of variable length decoders decodes the data from the buffers and outputs the data in parallel form to a multiplexer where it is reassembled into a serial expanded data stream. The incoming data includes selector information in fixed length headers that are separated, buffered and variable length decoded for controlling the demultiplexer. In one aspect of the invention, the data is sorted into substantially equal sized groups of integral codewords for equalizing the loading of the parallel buffers.

Abstract: A coefficient updating system for a time sampled filter, such as a finite impulse response filter, includes a new coefficient register for updating the coefficients stored in the filter register. In order to preclude the generation of partial products in the filter from including a combination of old and new coefficients, the old coefficients are replaced by corresponding new coefficients in a time sequential manner at the rate at which the filter is clocked.

Abstract: A hybrid television signal of less transmission power or better signal to noise performance is made up by removing low frequency analog components from the video signal, digitizing them and sending them as data in non-active video portions of the transmitted signal. A two step hybridization process, with the first step removing the line averaged value of the video components of the video signal and the second step removing the remainder of the video components under 200 KHz, is described. Temporal filtering, signal pre-emphasis, compression, time dispersion and double sideband suppressed carrier modulation about a centered carrier are disclosed for reducing peak signal amplitudes and for minimizing co-channel interference to and from NTSC signals. Time dispersion is done horizontally, vertically or both to reduce the peak signal amplitudes. Time dispersion in conjunction with low frequency removal and temporal filtering is preferred.

Abstract: In a home security system, a microprocessor-based controller is responsive to user initiated keyboard entries for programming a plurality of remote sensors via a serial data link with sensor-unique data such as a sensor identification number and a house identification number. The thus programmed sensor may then be disconnected from and remotely located with respect to the controller for providing alert signals via an RF link to the controller upon triggering of the sensor. The programming data is also stored in the controller as well as in a central station to which a plurality of home-based controllers are coupled to provide the security system with a high degree of reliability.

Abstract: A low voltage reset circuit includes a first transistor having a base connected to a voltage divider and an emitter connected to the junction of a resistor-diode arrangement such that when the supply voltage falls to a trigger voltage level, the transistor is driven conductive. A second transistor is connected to the collector of the first transistor and is driven conductive therewith for applying a reset voltage to the reset terminal of a microprocessor. The collector of the second transistor is returned through a resistor to the base of said first transistor to provide positive feedback such that the first transistor is maintained in conduction until the supply voltage rises above the trigger voltage level.