Abstract: Systems, methods and apparatus are provided for a multi-coil induction apparatus. The multi-coil induction apparatus has a primary coil structure with a primary first coil portion and a primary second coil portion where both are on a common planar surface; and a secondary coil structure having a secondary first coil portion and a secondary second coil, where the secondary first coil portion and the secondary second coil portion are coplanar with the primary first coil portion and the primary second coil. The primary first coil portion and the secondary first coil portion concentrically turn on the common planar surface to form a coupled induction section while the primary second coil portion and the secondary second coil portion are adjacent the coupled induction section on the common planar surface.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: A superconducting magnet is provided for magnetic resonance imaging (MRI) or spectroscopy (MRS). The magnet has a plurality of discrete Niobium-Titanium superconductor coils arranged longitudinally along a common central axis, the Niobium-Titanium superconductor coils generating a first magnetic field when in use, the first magnetic field having high field regions of at least 5 Tesla radially inward of the discrete coils. At least two Niobium-Tin superconductor coils are located along the common central axis, each of which is located in a said high field region of the first magnetic field, the Niobium-Tin superconductor coils each generating a respective second magnetic field when in use, which combines with the first magnetic field to produce a resultant magnetic field which is of higher field strength than that of the first magnetic field at a location on the common central axis.

Abstract: Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count of the plurality of bitstreams is greater than count of the plurality of multilevel signals. The driver circuit further configured to drive the plurality of multilevel signals onto a plurality of signal lines using individual drivers. A driver of the individual drivers is configured to drive more than two voltages.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to die first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

Abstract: A superconducting magnet is provided for magnetic resonance imaging (MRI) or spectroscopy (MRS). The magnet has a plurality of discrete Niobium-Titanium superconductor coils arranged longitudinally along a common central axis, the Niobium-Titanium superconductor coils generating a first magnetic field when in use, the first magnetic field having high field regions of at least 5 Tesla radially inward of the discrete coils. At least two Niobium-Tin superconductor coils are located along the common central axis, each of which is located in a said high field region of the first magnetic field, the Niobium-Tin superconductor coils each generating a respective second magnetic field when in use, which combines with the first magnetic field to produce a resultant magnetic field which is of higher field strength than that of the first magnetic field at a location on the common central axis.

Abstract: An improved reference voltage (Vref) generator useable, for example, in sensing data on single-ended channels is disclosed. The Vref generator can be placed on the integrated circuit containing the receivers, or may be placed off chip. In one embodiment, the Vref generator comprises an adjustable-resistance voltage divider in combination with a current source. The voltage divider is referenced to I/O power supplies Vddq and Vssq, with Vref being generated at a node intervening between the adjustable resistances of the voltage divider. The current source injects a current into the Vref node and into a non-varying Thevenin equivalent resistance formed of the same resistors used in the voltage divider. So constructed, the voltage generated equals the sum of two terms: a first term comprising the slope between Vref and Vddq, and a second term comprising a Vref offset.

Abstract: Devices and methods are described, such as those including parallel paths coupled between a first power supply and a second power supply. The parallel paths include different values of capacitance to reduce unwanted variations as a function of current demand frequency such as resonance. A selectable resistance is provided along one or more parallel paths, and can be varied during different times in a signal burst.

Abstract: Embodiments of the invention comprise a continuous-time equalizer for reducing ISI in data received from a communication channel, and methods and circuitry for tuning or calibrating that equalizer. Selected coefficients for a transfer function of the equalizer circuit are fixed, while other coefficients are tuned by an adaptive algorithm. The adaptive algorithm minimizes errors associated with the tunable coefficients based on one or more training signals sent by the transmitter and received by the equalizer circuit at the receiver. The training signals allow for a variety of error terms to be calculated, from which the tunable coefficients are updated so as to iteratively minimize the error terms and simultaneously tune the equalizer to more accurately compensate for the degrading effects of the channel.