Abstract: An apparatus and method are provided for executing a plurality of threads. The apparatus has processing circuitry arranged to execute the plurality of threads, with each thread executing a program to perform processing operations on thread data. Each thread has a thread identifier, and the thread data includes a value which is dependent on the thread identifier. Value generator circuitry is provided to perform a computation using the thread identifier of a chosen thread in order to generate the above mentioned value for that chosen thread, and to make that value available to the processing circuitry for use by the processing circuitry when executing the chosen thread. Such an arrangement can give rise to significant performance benefits when executing the plurality of threads on the apparatus.

Abstract: A data processing apparatus and method are provided for executing a plurality of threads. Processing circuitry performs processing operations required by the plurality of threads, the processing operations including a lock-protected processing operation with which a lock is associated, where the lock needs to be acquired before the processing circuitry performs the lock-protected processing operation. Baton maintenance circuitry is used to maintain a baton in association with the plurality of threads, the baton forming a proxy for the lock, and the baton maintenance circuitry being configured to allocate the baton between the threads.

Abstract: A data processing apparatus 10 for executing an access instruction for n threads in order to access data values for the n threads includes storage circuitry 100 that stores data values associated with the n threads in groups defined by storage boundaries. The data processing apparatus also includes processing circuitry 80 that processes the access instruction for a set of threads at a time (where each set of threads comprises fewer than n threads) and splitting circuitry 110, responsive to the access instruction, to divide the n threads into multiple sets of threads, and to generate at least one control signal identifying the multiple sets. For each of the sets, the processing circuitry responds to the at least one control signal by issuing at least one access request to the storage circuitry in order to access the data values for that set. The splitting circuitry determines into which set each of the n threads is allocated having regards to the storage boundaries.

Abstract: A data processing apparatus and method processing data are disclosed. Execution circuitry is configured to execute multiple threads to perform data processing on input data by reference to at least one coordinate value of points in a reference domain. Thread allocation circuitry is configured to specify a selected point in the reference domain for each thread of the multiple threads respectively in order to allocate the data processing by specifying for each thread the at least one coordinate value of the specified point for that thread. Each thread accesses the input data with reference to its selected point in the reference domain and an order in which points in the reference domain are allocated to threads for data processing is configurable in the thread allocation circuitry.

Abstract: A data processing apparatus and method are provided for executing a plurality of threads. Processing circuitry performs processing operations required by the plurality of threads, the processing operations including a lock-protected processing operation with which a lock is associated, where the lock needs to be acquired before the processing circuitry performs the lock-protected processing operation. Baton maintenance circuitry is used to maintain a baton in association with the plurality of threads, the baton forming a proxy for the lock, and the baton maintenance circuitry being configured to allocate the baton between the threads.

Abstract: An apparatus and method are provided for executing a plurality of threads. The apparatus has processing circuitry arranged to execute the plurality of threads, with each thread executing a program to perform processing operations on thread data. Each thread has a thread identifier, and the thread data includes a value which is dependent on the thread identifier. Value generator circuitry is provided to perform a computation using the thread identifier of a chosen thread in order to generate the above mentioned value for that chosen thread, and to make that value available to the processing circuitry for use by the processing circuitry when executing the chosen thread. Such an arrangement can give rise to significant performance benefits when executing the plurality of threads on the apparatus.

Abstract: A method and apparatus for processing data when an interrupt is received during processing of a function at a point during the processing at which a portion of the function has been processed then a control parameter is accessed. In response to a control parameter having a value indicting that the function has idempotence, processing of the function is stopped, and information on progress of the function is discarded such that following completion of the interrupt the portion of the function that has already been processed is processed again. In response to the control parameter having a value indicating that the function does not have idempotence, processing of the function is suspended without discarding information on progress of the function that has already been processed such that following completion of the interrupt the processing is resumed from a point that it reached when it was suspended.

Abstract: A data processing apparatus 10 for executing an access instruction for n threads in order to access data values for the n threads includes storage circuitry 100 that stores data values associated with the n threads in groups defined by storage boundaries. The data processing apparatus also includes processing circuitry 80 that processes the access instruction for a set of threads at a time (where each set of threads comprises fewer than n threads) and splitting circuitry 110, responsive to the access instruction, to divide the n threads into multiple sets of threads, and to generate at least one control signal identifying the multiple sets. For each of the sets, the processing circuitry responds to the at least one control signal by issuing at least one access request to the storage circuitry in order to access the data values for that set. The splitting circuitry determines into which set each of the n threads is allocated having regards to the storage boundaries.

Abstract: A data processing apparatus and method processing data are disclosed. Execution circuitry is configured to execute multiple threads to perform data processing on input data by reference to at least one coordinate value of points in a reference domain. Thread allocation circuitry is configured to specify a selected point in the reference domain for each thread of the multiple threads respectively in order to allocate the data processing by specifying for each thread the at least one coordinate value of the specified point for that thread. Each thread accesses the input data with reference to its selected point in the reference domain and an order in which points in the reference domain are allocated to threads for data processing is configurable in the thread allocation circuitry.

Abstract: A method and apparatus for processing data in which a function is processed using a processor operable to perform a plurality of functions is disclosed. When an interrupt is received during processing of the function at a point during the processing at which a portion of the function has been processed then a control parameter is accessed. In response to the control parameter having a value indicting that the function has idempotence processing of the function is stopped without processing the function further, and information on progress of the function is discarded such that following completion of the interrupt the portion of the function that has already been processed is processed again.

Abstract: There is provided a screen multiplexor for processing graphical display data and an associated distribution method. A plurality of graphical display data streams is received at the multiplexor, processed and directed to one or more network-connected display devices. The network is a general purpose data network and may be wireless. The directed data streams can be spatially multiplexed, temporally multiplexed, and/or multiplexed in such a way that data from one stream is overlaid on data from another stream. The distribution method and screen multiplexor thus allow a flexible relationship between the number of screens and the sources of the information to be displayed thereon.

Abstract: A display device for transmitting, over a general purpose data network, graphical data to a remote device, the display device comprising a framebuffer memory for storing the graphical data; and a network interface for maintaining two-way network transmission of graphical data to and from the display device and operable to read or write to the framebuffer memory; wherein the network interface transmits the contents of the framebuffer memory to at least one remote device over the network.

Abstract: A display system comprises a plurality of display modules, a data network and a data processing device. The display modules and the data processing device are connected to the data network. Each display module has a memory for storing image data and the data processing device is arranged to transmit image data to each display module via the data network. The data processing device is further arranged to transmit a specific instruction to a display module, the specific instruction comprising details of image data to be transmitted from a first display module to a second display module.

Abstract: Systems and methods are provided having a plurality of ultra-thin client devices coupled to at least one display device and a data processing device coupled to the ultra-thin client devices over a general purpose data network, the data processing device being operable to transmit image data directly representing at least a portion of the image displayed on one or more of the display devices over the general purpose data network.

Abstract: A display system comprises a plurality of display devices, a plurality of display control devices, each display device O connected to at least one display control device, a data processing device and a data network, the data processing device connected to each display control device via the data network. The data processing device is arranged to transmit a control signal to a display control device, the control signal comprising video signal configuration data, the video signal configuration data comprising timing and frequency data. Alternatively or additionally, the control signal can comprise at least one of power saving data, memory use data, brightness and contrast data, colour temperature data or display address data.