Abstract: When a media error occurs on a storage device of a number of storage devices of a redundant array, the logical stripe of data affected by the media error is determined. A portion of non-volatile memory is reserved and the logical stripe is backed up to this portion of non-volatile memory. A read request is subsequently serviced from the non-volatile memory and not from the storage devices. When a write request is received, it is first serviced to the storage devices. If successful, then the previously reserved portion of non-volatile memory is freed up, and subsequent requests are serviced using the storage devices. If unsuccessful, then the write request is serviced using the non-volatile memory.

Abstract: When a media error occurs on a storage device of a number of storage devices of a redundant array, the logical stripe of data affected by the media error is determined. A portion of non-volatile memory is reserved and the logical stripe is backed up to this portion of non-volatile memory. A read request is subsequently serviced from the non-volatile memory and not from the storage devices. When a write request is received, it is first serviced to the storage devices. If successful, then the previously reserved portion of non-volatile memory is freed up, and subsequent requests are serviced using the storage devices. If unsuccessful, then the write request is serviced using the non-volatile memory.

Abstract: Expedited memory drive self test, including: determining, by a drive self test module, a base block size for testing a memory drive; determining, by a drive self test module, a block group size for testing a memory drive; determining, by the drive self test module, a percentage of the memory drive to test; and for each block group size of memory in the memory drive: testing for media defects, by the drive self test module, a number of blocks in a block group that corresponds to the percentage of the memory drive to test.

Abstract: Expedited memory drive self test, including: determining, by a drive self test module, a base block size for testing a memory drive; determining, by a drive self test module, a block group size for testing a memory drive; determining, by the drive self test module, a percentage of the memory drive to test; and for each block group size of memory in the memory drive: testing for media defects, by the drive self test module, a number of blocks in a block group that corresponds to the percentage of the memory drive to test.

Abstract: A method and computer program product for sending a data request from a host bus adapter logic processor to a hard disk drive, setting a standard time out period for receiving a reply from the hard disk drive, sensing vibration in the hard disk drive, sending a vibration alert signal from the hard disk drive to the host bus adapter logic processor in response to the sensed vibration exceeding a predetermined amount of vibration, and, in response to receiving the vibration alert signal from the hard disk drive, the host bus adapter logic processor establishing an extended time out period for receiving the reply. The rotational vibration sensor used by the hard disk drive for repositioning the read/write head may also be used to sense the vibration and form the basis for the vibration alert signal, such as a vibration error code. By extending the time out period during high vibration events, the hard disk drive can ride out the event without being tagged as having failed.

Abstract: A parallel port interface for utilization between a first device and a second device designated by a user for transmitting a digital signal from the device to the second device. The parallel port interface includes a switchable driver circuit for transmitting the digital signal, which includes a first circuit for emulating an open collector circuit and a second circuit for emulating a totem pole circuit. The switchable driver circuit is controlled by a logic control circuit that automatically selects either the first circuit or the second circuit for transmitting the digital signal in response to the digital signal and a designation of the second device.

Abstract: An error correcting code (ECC) function and a parity interface scheme providing a translation capability between the ECC and parity protocols is implemented for memory systems in personal computers (PCs). The ECC function addresses the problems of interfacing memory with a variety of other components that may communicate in words composed of differing numbers of bytes. A partial write function within an ECC module permits a read/modify/write operation without extra components, at faster speeds and with minimal use of the system bus. An improved parity/ECC protocol interface is implemented by choosing an appropriate ECC code to facilitate parity generation and checking. This is done by selecting a code that contains groupings of data bits corresponding to the desired parity scheme. The ECC XOR trees are modified to allow parity checking and error correction decode simultaneously, thereby eliminating the need for two sets of XOR trees in the interface.

Abstract: A parallel interface connects a data processor and a printer so that each may transmit information to the other or receive information from the other. The transmitted information from the data processor can be data or status signals. The data or status signals are transmitted over the same eight information lines between the data processor and the printer with a predetermined signal being sent over another line from the data processor to the printer prior to transmission over the eight lines to identify whether the transmitted information is data or status signals. The printer sends status signals to the data processor over the same eight information lines after sending a predetermined signal to the data processor over a further line that it is going to transmit.