Abstract: An interline transfer type area image sensor which operates in a non-interlaced mode and has an array of columns and rows of photoreceptor in which charge from each pixel is transferred into a stage of a vertical two-phase CCD shift register formed by adjacent electrodes of the CCD. Each electrode of a stage has a separate voltage clock. An ion implanted vertical transfer barrier region is formed under an edge of each electrode.

Abstract: In interline transfer type are image sensor wherein photogenerated charge is transferred from a pixel into a charge coupled dvice (CCD) or shift register. The CCD structure is typically composed of two or more overlapping levels of polysilicon electrodes associated with each row of pixels. In accordance with invention, a CCD with simplified structure and hence improved manufacturability is described. The CCD utilizes ion implanted barrier regions, which may be self-aligned such as described by Losee et al. U.S. Pat. No. 4,613,402, to produce a device with single polysilicon electrode associated with each pixel.