Patents by Inventor Timothy Joe Johnson

Timothy Joe Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020180050
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: June 1, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Barbara M. Foley, Duane C. Rabe, Kevin B. Traylor, Timothy Joe Johnson
  • Publication number: 20020180049
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventor: Timothy Joe Johnson
  • Publication number: 20020181826
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates by forming a compliant substrate for growing the monocrystalline layers. One way to achieve compliancy includes first growing on a silicon wafer an accommodating buffer layer that is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. In this way, high speed devices can be fabricated along with integral silicon-based circuitry to provide an efficient, low-cost semiconductor structure. Moreover, I/O pins and their associated problems can be eliminated.
    Type: Application
    Filed: June 1, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Timothy Joe Johnson, Kevin B. Traylor, Duane C. Rabe
  • Publication number: 20020181825
    Abstract: An integrated circuit that distributes its clock signals optically is provided. The integrated circuit may preferably include a plurality of digital CMOS circuits that communicate optically. The optical devices are preferably formed from compound semiconductor structures.
    Type: Application
    Filed: June 1, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Timothy Joe Johnson, Kevin B. Traylor, Duane C. Rabe, Barbara Foley Barenburg
  • Publication number: 20020180048
    Abstract: A stacked semiconductor device structure includes an underlying MOS device formed on a silicon substrate and an overlying GaAs device. An accommodating buffer layer is formed between the MOS device and the GaAs device. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon substrate by an amorphous interface layer of silicon oxide, and is lattice matched to both the underlying silicon substrate and the overlying GaAs layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Metal interconnects are provided for connecting the MOS device and the GaAs device.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventors: James Irwin, Timothy Joe Johnson
  • Publication number: 20020179926
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: June 1, 2001
    Publication date: December 5, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Barbara M. Foley, Duane C. Rabe, Kevin B. Traylor, Timothy Joe Johnson
  • Patent number: 5808489
    Abstract: A pulse detecting system 1 has a high speed A/D converter 10 and a slew controlled pulse detector 110. The A/D converter 10 has large hysteresis for holding the converted digital value of an input signal V.sub.PULSE until the A/D converter 10 is reset. The slew controlled pulse detector 110 limits the slew rate of large amplitude pulse to correct arrival errors and provide an output signal V.sub.AT that more accurately represents the arrival time of the input pulse signal, V.sub.PULSE.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: September 15, 1998
    Assignee: Harris Corporation
    Inventor: Timothy Joe Johnson