Abstract: A storage cell of an integrated circuit is operable in a radiation environment to capture and store at predetermined time intervals a time sample of a data input signal. A signal representative of the stored data sample for each time interval is generated at an output of the storage cell. At least three data capturing circuits operate to capture and store a time sample of the data input signal at each predetermined time interval, the stored data sample of each circuit being generated correspondingly at an output thereof. Coupled to the outputs of the data capturing circuits is a circuit for generating a signal representative of a stored data sample selected from at least two of the circuit outputs. Also coupled to the data capturing circuits is a circuit for causing each data capturing circuit to capture a different time sample of the input data signal from the other data capturing circuits over each predetermined time interval.

Abstract: An internal memory section of a digital processing system protectable by error detection and correction (EDAC) codes comprises at least one bank of registers for storing digital words and EDAC codes corresponding thereto. An EDAC code is generated for each digital word stored in a register of the at least one bank and the stored digital words of the at least one bank are checked with their EDAC codes. Also disclosed is a method of accessing digital words protectable by EDAC codes in a digital processing system which comprises the steps of: storing digital words and EDAC codes corresponding thereto in at least one bank of registers of an internal memory of the system; generating an EDAC code for each digital word upon storage; reading digital words and their corresponding EDAC codes from designated registers of the at least one bank; and checking the read digital words with their EDAC codes.