Abstract: A credit regulation and monitoring module receives a command for an application that is to be executed. In response to the command, credit amount for execution of the command is calculated. Further, an outstanding credit amount is determined based on an outstanding credit table and the other commands being executed. It is determined whether the credit amount and the outstanding credit are below a threshold value. If so, the command is executed and an outstanding credit table is updated to reduce the amount of credit available according to the credit amount allocated to the command.

Abstract: A credit regulation and monitoring module receives a command for an application that is to be executed. In response to the command, credit amount for execution of the command is calculated. Further, an outstanding credit amount is determined based on an outstanding credit table and the other commands being executed. It is determined whether the credit amount and the outstanding credit are below a threshold value. If so, the command is executed and an outstanding credit table is updated to reduce the amount of credit available according to the credit amount allocated to the command.

Abstract: A credit regulation and monitoring module receives a command for an application that is to be executed. In response to the command, credit amount for execution of the command is calculated. Further, an outstanding credit amount is determined based on an outstanding credit table and the other commands being executed. It is determined whether the credit amount and the outstanding credit are below a threshold value. If so, the command is executed and an outstanding credit table is updated to reduce the amount of credit available according to the credit amount allocated to the command.

Abstract: Methods, systems, and computer-readable storage media for a storage device to, upon receiving a command from a computing host, determine whether or not the command includes location information targeting a particular portion of a NVM of the storage device, the location information having been retrieved by the computing host from a shadow map and included with the command. Upon determining that the command includes location information, the command is processed by the storage device using the included location information. Upon determining that the command does not include location information, the storage device determines the particular portion of the NVM targeted by the command based on a map stored in a memory of the storage device before processing the command.

Abstract: Methods, systems, and computer-readable storage media for a storage device to, upon receiving a command from a computing host, determine whether or not the command includes location information targeting a particular portion of a NVM of the storage device, the location information having been retrieved by the computing host from a shadow map and included with the command. Upon determining that the command includes location information, the command is processed by the storage device using the included location information. Upon determining that the command does not include location information, the storage device determines the particular portion of the NVM targeted by the command based on a map stored in a memory of the storage device before processing the command.

Abstract: Methods, systems and computer-readable storage media for receiving, via an external interface of a storage device, a command from a computing host, the command including at least one non-standard command modifier, executing the command according to a particular non-standard command modifier, storing an indication of the particular non-standard command modifier in an entry of a map associated with a logical block address of the command, and storing a shadow copy of the map in a memory of the computing host.

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.

Abstract: Method and apparatus for managing data in a data storage device. In some embodiments, a non-volatile cache memory stores a sequence of pages from a host device. A non-volatile main memory has a plurality of n-level cells arranged on m separate integrated circuit dies each simultaneously accessible during programming and read operations using an associated transfer circuit, where m and n are plural numbers. A control circuit writes first and second pages from the sequence of pages to a selected set of the n-level cells coupled to a common word line on a selected integrated circuit die. The second page is separated from the first page in the sequence of pages by a logical offset comprising a plurality of intervening pages in the sequence of pages. The logical offset is selected responsive to the m number of integrated circuit dies and a delay time associated with the transfer circuits.

Abstract: A non-volatile storage system having Non-Volatile Memory (NVM) provides self-journaling and hierarchical consistency, enabling low-latency recovery and force unit access handshake. Mappings between host addresses and addresses in the NVM are maintained via one or more map entries, enabling locating of host data written to the NVM. Objects stored in the NVM include sufficient information to recover the object solely within the object itself. The NVM is managed as one or more data streams, a map stream, and a checkpoint stream. Host data is written to the data streams, map entries are written to the map stream, and checkpoints of map entries and other data structures are written to the checkpoint stream. Time markers embedded in the streams enable determination, during recovery, that selected portions of the streams are inconsistent with each other and are to be discarded.

Abstract: Method and apparatus for managing data in a Non-Volatile Memory (NVD). In some embodiments, management information is stored in a buffer memory using a Solid-State Disk (SSD) controller circuit, the management information comprising a map data structure that associates storage addresses of a host device to physical addresses of the NVD. A location in the management information is determined responsive to a selected host storage address and a programmable parameter by arithmetically dividing in accordance with a divisor specified at least in part by the programmable parameter. The location in the management information is used to direct a transfer of user data by the SSD control circuit between the host device and the NVM.

Abstract: Methods, systems and computer-readable storage media for receiving, via an external interface of a storage device, a command from a computing host, the command including at least one non-standard command modifier, executing the command according to a particular non-standard command modifier, storing an indication of the particular non-standard command modifier in an entry of a map associated with a logical block address of the command, and storing a shadow copy of the map in a memory of the computing host.

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.

Abstract: A non-volatile storage system having Non-Volatile Memory (NVM) provides self-journaling and hierarchical consistency, enabling low-latency recovery and force unit access handshake. Mappings between host addresses and addresses in the NVM are maintained via one or more map entries, enabling locating of host data written to the NVM. Objects stored in the NVM include sufficient information to recover the object solely within the object itself. The NVM is managed as one or more data streams, a map stream, and a checkpoint stream. Host data is written to the data streams, map entries are written to the map stream, and checkpoints of map entries and other data structures are written to the checkpoint stream. Time markers embedded in the streams enable determination, during recovery, that selected portions of the streams are inconsistent with each other and are to be discarded.

Abstract: An I/O device is coupled to a computing host. In some embodiments, the device is enabled to utilize memory of the computing host not directly coupled to the device to store information such as a shadow copy of a map of the device and/or state of the device. Storage of the shadow copy of the map enables one or both of the device and the computing host to utilize the shadow copy of the map, such as to decrease read latency. Storage of the state enables the device to save volatile state that would otherwise be lost when the device enters a low-power state. In some embodiments, the device implements one or more non-standard modifiers of standard commands. The non-standard modifiers modify the execution of the standard commands, providing features not present in a host protocol having only the standard commands.

Abstract: Method and apparatus for managing data in a Non-Volatile Memory (NVD). In some embodiments, management information is stored in a buffer memory using a Solid-State Disk (SSD) controller circuit, the management information comprising a map data structure that associates storage addresses of a host device to physical addresses of the NVD. A location in the management information is determined responsive to a selected host storage address and a programmable parameter by arithmetically dividing in accordance with a divisor specified at least in part by the programmable parameter. The location in the management information is used to direct a transfer of user data by the SSD control circuit between the host device and the NVM.

Abstract: An apparatus includes a memory and a controller. The memory includes a plurality of memory devices. Each memory device has a plurality of page types. The plurality of page types are classified based on error rate variations. The controller may be configured to write user data and error-correction data to the memory. The user data and the error-correction data are organized as a super-page. The super-page includes a plurality of sub-pages. The plurality of sub-pages are written across the plurality of memory devices such that the plurality of sub-pages are stored using more than one of the plurality of page types.

Abstract: A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.

Abstract: An apparatus includes a memory and a controller. The memory includes a plurality of memory devices. Each memory device has a plurality of page types. The plurality of page types are classified based on error rate variations. The controller may be configured to write user data and error-correction data to the memory. The user data and the error-correction data are organized as a super-page. The super-page includes a plurality of sub-pages. The plurality of sub-pages are written across the plurality of memory devices such that the plurality of sub-pages are stored using more than one of the plurality of page types.