Abstract: An approach to identifying poorly performing data storage devices (DSDs) in a data storage system, such as hard disk drives (HDDs) and/or solid-state drives (SSDs), involves retrieving and evaluating a respective set of log pages, such as SCSI Log Sense counters, from each of multiple DSDs. Based on each respective set of log pages, a value for a Quality of Service (QoS) metric is determined for each respective DSD, where each QoS value represents an average percentage of bytes processed without the respective DSD performing an autonomous error correction. In response to a particular DSD reaching a predetermined threshold QoS value, an in-situ repair may be determined for the particular DSD or the particular DSD may be added to a list of candidate DSDs for further examination, which may include an FRPH examination for suitably configured DSDs.

Abstract: An approach to identifying problematic data storage devices, such as hard disk drives (HDDs), in a data storage system involves retrieving and evaluating a respective recovery log, such as a media error section of a device status log, from each of multiple HDDs. Based on each recovery log, a value for a Full Recoveries Per Hour (FRPH) metric is determined for each read-write head of each respective HDD. Generally, the FRPH metric characterizes the amount of time a head has spent performing recovery operations. In response to a particular head FRPH reaching a pre-determined threshold value, an in-situ repair can be determined for the HDD in which the head operates. Similarly, in the context of solid-state drives (SSDs), a latency metric is determinable based on time spent waiting on resolving input/output (IO) request collisions, on which an in-situ repair can be based.

Abstract: A dynamic scalable error correction coding (ECC) scheme for a data storage system involves a system controller predicting a type and/or amount of ECC needed to reconstruct data to be stored on a particular data storage device(s) based on operational data integrity information accessed from the array of data storage devices. Thus, redundancy does not need to be allocated unless required. The devices may be logically grouped into subsets according to common characteristics, whereby the prediction made for a device in a subset may be based on the data integrity information from that subset, as well as from other relevant subsets.

Abstract: An approach to identifying poorly performing data storage devices (DSDs) in a data storage system, such as hard disk drives (HDDs) and/or solid-state drives (SSDs), involves retrieving and evaluating a respective set of log pages, such as SCSI Log Sense counters, from each of multiple DSDs. Based on each respective set of log pages, a value for a Quality of Service (QoS) metric is determined for each respective DSD, where each QoS value represents an average percentage of bytes processed without the respective DSD performing an autonomous error correction. In response to a particular DSD reaching a predetermined threshold QoS value, an in-situ repair may be determined for the particular DSD or the particular DSD may be added to a list of candidate DSDs for further examination, which may include an FRPH examination for suitably configured DSDs.

Abstract: An approach to identifying problematic data storage devices, such as hard disk drives (HDDs), in a data storage system involves retrieving and evaluating a respective recovery log, such as a media error section of a device status log, from each of multiple HDDs. Based on each recovery log, a value for a Full Recoveries Per Hour (FRPH) metric is determined for each read-write head of each respective HDD. Generally, the FRPH metric characterizes the amount of time a head has spent performing recovery operations. In response to a particular head FRPH reaching a pre-determined threshold value, an in-situ repair can be determined for the HDD in which the head operates. Similarly, in the context of solid-state drives (SSDs), a latency metric is determinable based on time spent waiting on resolving input/output (IO) request collisions, on which an in-situ repair can be based.

Abstract: Non-limiting examples of the present disclosure relate to execution of in-situ manufacturing for a data storage device. In-situ manufacturing is on-location configuration of a data storage device within an operational environment in which a data storage device is being deployed. In-situ manufacturing occurs at any point after a data storage device is shipped from a manufacturing plant or factory. When an operational environment of the data storage device is known, parameters of the data storage device can be configured (or re-configured) on-location within an operational environment to optimize capacity management as well as performance of the data storage device.

Abstract: Non-limiting examples of the present disclosure relate to execution of in-situ manufacturing for a data storage device. In-situ manufacturing is on-location configuration of a data storage device within an operational environment in which a data storage device is being deployed. In-situ manufacturing occurs at any point after a data storage device is shipped from a manufacturing plant or factory. When an operational environment of the data storage device is known, parameters of the data storage device can be configured (or re-configured) on-location within an operational environment to optimize capacity management as well as performance of the data storage device.

Abstract: A dynamic scalable error correction coding (ECC) scheme for a data storage system involves a system controller predicting a type and/or amount of ECC needed to reconstruct data to be stored on a particular data storage device(s) based on operational data integrity information accessed from the array of data storage devices. Thus, redundancy does not need to be allocated unless required. The devices may be logically grouped into subsets according to common characteristics, whereby the prediction made for a device in a subset may be based on the data integrity information from that subset, as well as from other relevant subsets.

Abstract: A side loading enclosure for a rack mount type storage unit is provided. The enclosure provides for easier access to hard disk drives (HDDs) for maintenance and repair as well as the ability to increase the number of HDDs that can be mounted in a single enclosure. The enclosure may include a bottom plate, a pair of side plates, and a pair of end plates. Located within the enclosure are a first row, extending perpendicularly between the pair of end plates, having one or more stacks of HDDs mounted to a first printed circuit board and a second row, extending perpendicularly between the pair of end plates, having one or more stacks of HDDs mounted to a second printed circuit board. The one or more stacks of HDDS in the first row is separate from and located parallel to the one or more stacks of HDDs in the second row.

Abstract: A system can comprise an I/O circuitry, a processor, reconfigurable circuitry, an array of flash storage devices, and a serial interconnect network that is coupled to transfer data between the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The processor can be configured to designate an interconnect address space for use in communication over the interconnect network among the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The reconfigurable circuitry can be configured to translate data addresses during transfers of data between the I/O circuitry and the array of flash storage devices. A method to access an array of flash storage devices that are coupled to I/O circuitry over a serial interconnect network can comprise using reconfigurable circuitry to capture data during transfers of data over the serial interconnect network.

Abstract: Apparatus and method for accelerating processing operations of flash based storage systems are disclosed herein. In some embodiments, an IC component disposed between I/O circuitry and flash storage devices is configured to optimize fulfillment of data read and write requests originating from a network or device external to the flash based storage system using cache memory before involving the flash storage devices.

Abstract: A side loading enclosure for a rack mount type storage unit is provided. The enclosure provides for easier access to hard disk drives (HDDs) for maintenance and repair as well as the ability to increase the number of HDDs that can be mounted in a single enclosure. The enclosure may include a bottom plate, a pair of side plates, and a pair of end plates. Located within the enclosure are a first row, extending perpendicularly between the pair of end plates, having one or more stacks of HDDs mounted to a first printed circuit board and a second row, extending perpendicularly between the pair of end plates, having one or more stacks of HDDs mounted to a second printed circuit board. The one or more stacks of HDDS in the first row is separate from and located parallel to the one or more stacks of HDDs in the second row.

Abstract: In a high-performance data storage system, an enclosure contains a multiplicity of disk drives, each of which has two high-speed serial data ports. Respective data lines are provided which connect each of the data ports with a respective high-speed data multiplexer. Importantly, each of the multiplexers is also connected with each of two distinct I/O modules. Failure of either I/O module still permits the remaining I/O module to have serial high-speed connectivity with each of the multiplexers, and thus with each of the data ports on each disk drive. Finally, the overall function of the system may be selected as JBOD (Just a Bunch Of Drives), as SAN (Storage Area Network), or NAS (Network Attached Storage), without requiring any mechanical or electronic change other than the I/O modules.

Abstract: A system and method for automatically mapping on a computer display a graphical representation of a physical arrangement of a plurality of computer components in one or more cabinets, each cabinet having one or more shelves for housing the computer components. The status of the components is periodically monitored and the computer display updated accordingly. A graphical user interface is provided for user observation of the physical arrangement and status of computer components in the cabinets, as well as user control of the operational parameters of the components.

Abstract: A field-reprogammable storage control device has a microcontroller, a write-protected memory which contains a boot code for the storage control device, a rewriteable memory for application code executable by the microcontroller, and a jump function located in both the write-protected memory and the rewriteable memory for movement between the write-protected memory and the rewriteable memory for recover after a processing interruption. The storage control device remains operational using the write-protected memory and the boot code while receiving a new application code from a remote site.

Abstract: A system and method for automatically mapping on a computer display a graphical representation of a physical arrangement of a plurality of computer components in one or more cabinets, each cabinet having one or more shelves for housing the computer components. The status of the components is periodically monitored and the computer display updated accordingly. A graphical user interface is provided for user observation of the physical arrangement and status of computer components in the cabinets, as well as user control of the operational parameters of the components.

Abstract: Automatic shelf-to-shelf address assignment is provided for a plurality of disk drive supporting shelves that are removably contained within a multi--shelf cabinet. Error detection apparatus detects failure in the automatic assignment of shelf addresses. An address input of shelf-N receives a shelf addressing voltage from shelf N+1. Shelf-N checks to ensure that the received shelf-N address voltage is within a correct range. Where-N now increases its shelf-N address by one and applies this incremented address to an address input of shelf-N+1. Accuracy of the shelf-N+1 address input is checked, as are the cable/connectors that connect shelf-N to shelf-N+1. ADC and ADC techniques are used, and operation of the automatic address assignment system is timed.