Abstract: A CRT display system is connected to a central processing unit over a bus and includes a random access memory which is filled and modified under the control of the computer and contains a sequence of codes defining characters to be displayed on the screen in successive locations. An oscillator controlled divider chain increments an address counter and also provides vertical and horizontal synchronization and retrace signals. A character generator which receives a character code from a RAM location designated by the counter as well as timing signals from the divider chain controls intensity modulation of the CRT display. Multiplexers interposed at various points in the divider chain receive the output of several stages of the preceding divider and operate under control from the CPU to determine which output is provided to the next element in the chain, thereby controlling the character size and spacing on the screen.