Abstract: A video processing system includes a memory to store video data and a decoder to fetch the video data for processing. The decoder can be configured to perform a first fetch to obtain a luminance data and to perform a second fetch to obtain both a chrominance data and an additional portion of the luminance data.

Abstract: A video processing system includes a memory to store video data and a decoder to fetch the video data for processing. The decoder can be configured to perform a first fetch to obtain a luminance data and to perform a second fetch to obtain both a chrominance data and an additional portion of the luminance data.

Abstract: A system and method that process encoded data, wherein the encoded data is an encoded video stream. The encoded data may be buffered and the characteristics of the buffered encoded data may be determined and used to select a decoding table from a plurality of decoding tables. An encoded word may then be decoded using the selected decoding table. The output of the decoding table may be the corresponding decoded word and the size of the encoded word. The size of the encoded word may be utilized to shift the buffered encoded data. The decoded word may be sent to the appropriate portion of the system.

Abstract: A system and method that process encoded data, wherein the encoded data is an encoded video stream. The encoded data may be buffered and the characteristics of the buffered encoded data may be determined and used to select a decoding table from a plurality of decoding tables. An encoded word may then be decoded using the selected decoding table. The output of the decoding table may be the corresponding decoded word and the size of the encoded word. The size of the encoded word may be utilized to shift the buffered encoded data. The decoded word may be sent to the appropriate portion of the system.

Abstract: A system-on-a-chip controller having a first processor and a second processor. The first processor provides control processing and image processing. The second processor provides image processing. The processors receive data from an external source through a data bus. Also, the controller can include a third controller to provide I/O functionality to an external device. The second processor processes the stored data in either a row or column configuration. A fixed-length instruction word can be decoded into two instructions, an operation instruction and an I/O instruction, and can be used to process the data. The I/O instruction can be disposed in an unused bit field of the operation instruction.

Abstract: A system-on-a-chip controller having a first processor and a second processor. The first processor provides control processing and image processing. The second processor provides image processing. The processors receive data from an external source through a data bus. Also, the controller can include a third controller to provide I/O functionality to an external device. The second processor processes the stored data in either a row or column configuration. A fixed-length instruction word can be decoded into two instructions, an operation instruction and an I/O instruction, and can be used to process the data. The I/O instruction can be disposed in an unused bit field of the operation instruction.

Abstract: A clipping circuit and method for selecting a rectangular region of interest from an image comprised of scan lines of pixels. The circuit stores the lengths of the portions of scan lines inside and outside the region of interest. A data decompression unit presents image data to the clipping circuit in scan line order. When pixels from the portion of a scan line within the region of interest are processed, the circuit passes the pixels through the system. When pixels outside the region are processed, they are blocked from further processing by the circuit.