Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: The invention is directed to isolated renal cells, including tubular and erythropoietin (EPO)-producing kidney cell populations, and methods of isolating and culturing the same, as well as methods of treating a subject in need with the cell populations.

Abstract: Techniques are disclosed relating to processing groups of graphics work (which may be referred to as “kicks”) using a graphics processing pipeline. In some embodiments, a graphics processor includes multiple sets of configuration registers such that multiple kicks can be processed in the pipeline at the same time. In some embodiments, kicks are pipelined such that a subsequent kick ramps up use of hardware resources as a previous kick winds down. In some embodiments, the graphics processing may execute kicks concurrently and/or preemptively, e.g., based on a priority scheme. In some embodiments, the disclosed techniques may be used with pipelines that include front and back-end fixed function circuitry as well as shared programmable resources such as shader cores. In various embodiments, the disclosed techniques may improve overall performance and/or reduce latency for high-priority graphics tasks.

Abstract: A multiprocessor system includes a plurality of special purpose processors that perform different portions of a related processing task. A set of commands that cause each of the processors to perform the portions of the related task are distributed, and the set of commands includes a predicated execution command that precedes other commands within the set of commands. It is determined whether commands subsequent to the predicated execution command are intended to be executed by a first processor or a second processor based on information in the predicated execution command and the set of commands includes all commands to be executed by each processor.

Abstract: A multiprocessor system includes a plurality of special purpose processors that perform different portions of a related processing task. A set of commands that cause each of the processors to perform the portions of the related task are distributed, and the set of commands includes a predicated execution command that precedes other commands within the set of commands. It is determined whether commands subsequent to the predicated execution command are intended to be executed by a first processor or a second processor based on information in the predicated execution command and the set of commands includes all commands to be executed by each processor.

Abstract: A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.

Abstract: A method and system for accommodating at least one high priority data element from a plurality of data elements written into a ring buffer including a processor that preempts a ring buffer by modifying at least one of the data elements previously written to the ring buffer to create modified data elements in response to detecting a high priority data element to be written into the ring buffer. The processor modifies the plurality of data elements previously written to the ring buffer to create the modified data elements. The processor resubmits to the ring buffer at least one of the data elements corresponding to at least one of the modified data elements for execution by a graphics co-processor in response to processing the at least one high priority data element.

Abstract: A method and system for accommodating at least one high priority data element from a plurality of data elements written into a ring buffer including a processor that preempts a ring buffer by modifying at least one of the data elements previously written to the ring buffer to create modified data elements in response to detecting a high priority data element to be written into the ring buffer. The processor modifies the plurality of data elements previously written to the ring buffer to create the modified data elements. The processor resubmits to the ring buffer at least one of the data elements corresponding to at least one of the modified data elements for execution by a graphics co-processor in response to processing the at least one high priority data element.

Abstract: A video graphics system employs a method and apparatus for improving throughput of the system. The video graphics system includes a graphics driver, a graphics processor, and a memory. Responsive to receiving a drawing command from an application, the graphics driver determines whether the graphics processor can begin executing the drawing command within a desired period of time. When the graphics processor is heavily loaded and cannot begin executing the command within the desired period of time, the graphics driver partially processes stored vertex information associated with the drawing command, and preferably stores the pre-processed vertex information in the memory. The graphics driver then preferably issues a new drawing command relating to the stored pre-processed information and instructing the graphics processor not to perform any of the processing already performed by the graphics driver. The graphics driver is preferably implemented in software and stored on a computer-readable storage medium.

Abstract: A video graphics system employs a method and apparatus for selectively providing drawing commands to a graphics processor to improve the processing efficiency of the system. The video graphics system includes a graphics driver, a graphics processor, and a memory. The graphics driver is operably coupled to an application that issues drawing commands to be processed by the video graphics system. Each drawing command includes an address of a location within the memory that includes vertex information for the vertices of one or more graphics primitives to be displayed on a display device operably coupled to the graphics processor. The vertex information is stored in the memory by the application prior to issuance of a drawing command referencing the location in memory of the stored vertex information.