Abstract: A digital level control circuit, such as an Automatic Gain Control, includes a plurality of digitally selectable signal levels with transitions between levels gradually varied to avoid signal output level discontinuities. An up/down counter may be used to incrementally stepwise transition an output signal between the digitally selectable output levels. Stepwise application of a control signal to the appropriate switching elements (e.g., FETs) forming an attenuator circuit may be implemented to moderate a switching time of the switching elements to provide a more gradual transition between element operating states. A deglitch circuit may be employed to latch the switching elements to achieve the desired state at the end of a desired switching transition period.

Abstract: A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Abstract: Systems and methods which provide DC current path circuitry, such as for providing a DC bias, in association with a filter circuit such that parasitic attributes of the DC current path circuitry combines with the filter component attributes are shown. According to embodiments, the parasitic attributes of the DC current path circuitry components are added into the associated filter circuit network design. A parasitic capacitance of the DC current path circuitry may, for example, be aggregated with a capacitor of the filter circuit to eliminate or mitigate the effect of the presence of the DC current path circuitry on the associated filter frequency response. Embodiments implement an active inductor configuration for providing a DC current path in association with a filter circuit. An active inductor of embodiments is provided using a transistor, appropriately biased to actively exhibit low impedance at DC and high impedance at RF frequencies.

Abstract: Systems and methods which utilize low performance circuitry to provide received signal power detection without unacceptably impacting operation of a receiver circuit are shown. Circuitry utilized to provide received signal power detection according to embodiments comprises circuitry dedicated for use with respect to received signal power detection. Performance of the circuitry of the detection path may be lower than that required of circuitry of the signal processing path. However, performance parameters are selected to provide power detection of desired accuracy (e.g., flat gain) and to meet other performance metrics. Embodiments provide a low performance power detection circuit comprising a low performance tuner configuration. Further embodiments provide a low performance power detection circuit comprising a low performance data converter configuration.

Abstract: A digital level control circuit, such as an Automatic Gain Control, includes a plurality of digitally selectable signal levels with transitions between levels gradually varied to avoid signal output level discontinuities. An up/down counter may be used to incrementally stepwise transition an output signal between the digitally selectable output levels. Stepwise application of a control signal to the appropriate switching elements (e.g., FETs) forming an attenuator circuit may be implemented to moderate a switching time of the switching elements to provide a more gradual transition between element operating states. A deglitch circuit may be employed to latch the switching elements to achieve the desired state at the end of a desired switching transition period.

Abstract: A digital level control circuit, such as an Automatic Gain Control, includes a plurality of digitally selectable signal levels with transitions between levels gradually varied to avoid signal output level discontinuities. An up/down counter may be used to incrementally stepwise transition an output signal between the digitally selectable output levels. Stepwise application of a control signal to the appropriate switching elements (e.g., FETs) forming an attenuator circuit may be implemented to moderate a switching time of the switching elements to provide a more gradual transition between element operating states. A deglitch circuit may be employed to latch the switching elements to achieve the desired state at the end of a desired switching transition period.

Abstract: A system for processing signals comprises a tuner and an input/output (IO) bus bridge, wherein the tuner and the IO bus bridge are formed at least in part on same semiconductor chip, and wherein at least a portion of logic on the chip is implemented in Complementary Metal Oxide Semiconductor (CMOS) logic, and wherein at least another portion of the logic is implemented with silicon germanium (SiGe) logic.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.

Abstract: A system for processing a signal comprises a Radio Frequency (RF) signal tuner, one or more filters in a signal path of the RF tuner each based on Inductive/Capacitive (LC) circuitry, a variation unit operable to measure a variation of the LC circuitry, and a frequency control unit adapted to adjust the one or more filters based on the LC variation during operation of the tuner.

Abstract: A system for implementing a tuner comprising a Radio Frequency (RF) circuit, a filter disposed in a signal path in said RF circuit, a first negative resistance unit in communication with said filter adapted to cancel one or more resistive elements in said filter, a frequency measurement unit in communication with said filter, wherein said first negative resistance unit is adapted to cause said filter to act as an oscillator, and wherein said frequency measurement unit is adapted to measure oscillations of said filter and to calculate a center frequency of said filter therefrom.

Abstract: A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Abstract: A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Abstract: An apparatus for generating an output signal having a particular frequency includes an oscillator, a first tuning module, and a second tuning module. The oscillator generates an output signal associated with an output frequency. When coupled to the oscillator, the first tuning module is capable of inducing, within a first amount of time, a change in the output frequency of a particular magnitude. When coupled to the oscillator, the second tuning module is capable of inducing, within a second amount of time, a change in the output frequency of the same magnitude. The second amount of time is greater than the first amount of time. The selector couples a selected one of the first tuning module and the second tuning module to the oscillator based on a difference between a frequency-divided version of the output signal and a reference signal.

Abstract: A digital level control circuit, such as an Automatic Gain Control, includes a plurality of digitally selectable signal levels with transitions between levels gradually varied to avoid signal output level discontinuities. An up/down counter may be used to incrementally stepwise transition an output signal between the digitally selectable output levels. Stepwise application of a control signal to the appropriate switching elements (e.g., FETs) forming an attenuator circuit may be implemented to moderate a switching time of the switching elements to provide a more gradual transition between element operating states. A deglitch circuit may be employed to latch the switching elements to achieve the desired state at the end of a desired switching transition period.

Abstract: A level control circuit is responsive to some parameter of an input signal, e.g., signal level, to selectively bypass around an active circuit (e.g., amplifier stage) rendered unnecessary in view of the detected condition of the input signal, e.g., a signal level satisfying some threshold criteria. In addition to bypassing the active circuit, the control circuit may interrupt power to the circuit. In the case of amplifier stage that may be part of a radio frequency (RF) input stage of a receiver or tuner, upon detecting some threshold input signal level, the amplifier circuit is bypassed, i.e., taken out of the circuit and power to the circuit removed.

Abstract: A system for processing signals comprises a tuner and an input/output (IO) bus bridge, wherein the tuner and the IO bus bridge are formed at least in part on same semiconductor chip, and wherein at least a portion of logic on the chip is implemented in Complementary Metal Oxide Semiconductor (CMOS) logic, and wherein at least another portion of the logic is implemented with silicon germanium (SiGe) logic.

Abstract: A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Abstract: A system for processing a signal comprises a Radio Frequency (RF) signal tuner, one or more filters in a signal path of the RF tuner each based on Inductive/Capacitive (LC) circuitry, a variation unit operable to measure a variation of the LC circuitry, and a frequency control unit adapted to adjust the one or more filters based on the LC variation during operation of the tuner.

Abstract: A system for implementing a tuner comprising a Radio Frequency (RF) circuit, a filter disposed in a signal path in said RF circuit, a first negative resistance unit in communication with said filter adapted to cancel one or more resistive elements in said filter, a frequency measurement unit in communication with said filter, wherein said first negative resistance unit is adapted to cause said filter to act as an oscillator, and wherein said frequency measurement unit is adapted to measure oscillations of said filter and to calculate a center frequency of said filter therefrom.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.