Patents by Inventor Timothy Michael Skergan

Timothy Michael Skergan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7696979
    Abstract: An improved method and system for manipulation a plurality of graphical pointers utilizing a single graphical pointing device are disclosed. A plurality of graphical pointers are displayed within a display device. A user may then temporarily select one graphical pointer among the plurality of graphical pointers. During the selection, the selected graphical pointer is manipulated in response to operation of a single graphical pointing device. A point within the display device specified by the position of the selected graphical pointer is selected in response to closure of a switch associated with the selected graphical pointer.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: April 13, 2010
    Assignee: International Business Machines Coporation
    Inventor: Timothy Michael Skergan
  • Patent number: 6333653
    Abstract: The present invention is embodied in a clock controller for generating and controlling the phase alignment of a plurality of ratioed sub-clocks. A master clock is preferably input to a clock splitter to provide a plurality of slave clocks. Phase holds, generated from the slave clocks, are then used to gate each of the slave clocks to produce ratioed clocks that produce phase aligned clock pulses at integer factors of the master clock frequency. The clock controller controls the ratioed clocks by processing commands to start, stop, or pulse the ratioed clocks.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael Stephen Floyd, Kevin F. Reick, Timothy Michael Skergan
  • Patent number: 6226345
    Abstract: The present invention is embodied in a system and method for using cascaded counters with a programmable branch and one or more event clocks that together provide the capability to generate clock pulses at high speed. Further, the programmable counter of the present invention is capable of generating a precise number of clock pulses within a very wide range of numbers.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventor: Timothy Michael Skergan
  • Patent number: 5874854
    Abstract: A method of controlling a plurality of on-chip capacitors used to enhance power supply to logic circuits for a computer processor. The capacitors are each provided with transistors which temporarily disable the capacitors when an appropriate logic state is applied to the gate of the transistors. In this manner the effects of the capacitors upon system performance can be measured, and if a particular capacitor (or capacitor bank) is defective or presents an adverse impact, it can be permanently disabled by blowing fuses provided for each capacitor (or capacitor bank). The capacitors may be selectively disabled using a control circuit which has a multiplexer provided with a set of inputs from a register which contains a bit pattern that is used to determine which capacitors to disable. The register can be loaded with any pattern or with a pattern that corresponds to the states of the unblown fuses. Alternatively, all of the capacitors may be disabled, such as during power-on reset.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventor: Timothy Michael Skergan