Abstract: A method includes encoding, by a encoder, a video frame of a versatile-video coding (VVC) video-compression system. The encoder generates/uses tile information associated with a video frame, determines for a slice that the slice is a subset or a superset of a tile based on the tile information, determines slice parameters associated with the slice, and signals the slice parameters associated with the slice. In other aspects, a method may include retrieving, by a decoder of a video-compression system, tile information associated with a video frame, determining, for a slice, that the slice is a subset or a superset of a tile based on the tile information, determining slice parameters associated with the slice, and decoding the video frame using the determined slice parameters.

Abstract: A device implementing the subject video coding system may include at least one processor to determine an x-tap filter for horizontal interpolation of a N×M block. The processor further determines a y-tap filter for vertical interpolation of the N×M block, and encodes the N×M block using the x-tap filter and the y-tap filter. The value of x is proportional to N and the value of y is proportional to M.

Abstract: A method includes encoding, by a encoder, a video frame of a versatile-video coding (VVC) video-compression system. The encoder generates/uses tile information associated with a video frame, determines for a slice that the slice is a subset or a superset of a tile based on the tile information, determines slice parameters associated with the slice, and signals the slice parameters associated with the slice. In other aspects, a method may include retrieving, by a decoder of a video-compression system, tile information associated with a video frame, determining, for a slice, that the slice is a subset or a superset of a tile based on the tile information, determining slice parameters associated with the slice, and decoding the video frame using the determined slice parameters.

Abstract: A device implementing the subject video coding system may include at least one processor to determine an x-tap filter for horizontal interpolation of a N×M block. The processor further determines a y-tap filter for vertical interpolation of the N×M block, and encodes the N×M block using the x-tap filter and the y-tap filter. The value of x is proportional to N and the value of y is proportional to M.

Abstract: A device implementing the subject video coding system may include a processor that encodes an N×M block using an x-tap filter for horizontal interpolation and a y-tap filter for vertical interpolation, where x is proportional to N and y is proportional to M. The processor may use a current block size to select an interpolation filter with a first length or a second length for a current block, use an overlapped block size to select an interpolation filter with a first length or a second length for overlapped areas, and, when a neighboring block uses a long interpolation filter and a short interpolation filter is selected for the overlapped area, maps the long interpolation filter to a short interpolation filter of a selected type. The processor may calculate a reference block size based on a scaling factor and use the reference block size to select a filter length.

Abstract: A device implementing the subject video coding system may include a processor that encodes an N×M block using an x-tap filter for horizontal interpolation and a y-tap filter for vertical interpolation, where x is proportional to N and y is proportional to M. The processor may use a current block size to select an interpolation filter with a first length or a second length for a current block, use an overlapped block size to select an interpolation filter with a first length or a second length for overlapped areas, and, when a neighboring block uses a long interpolation filter and a short interpolation filter is selected for the overlapped area, maps the long interpolation filter to a short interpolation filter of a selected type. The processor may calculate a reference block size based on a scaling factor and use the reference block size to select a filter length.

Abstract: Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.

Abstract: Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.

Abstract: Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.

Abstract: A device for parallel symbol decoding may include a first and second block. The first block is configured to convert a bitstream into a stream of binary symbols corresponding to motion vector data and other compressed image data, insert length fields into the stream of binary symbols that are each indicative of a number of consecutive binary symbols that correspond to motion vector data, and store the stream of binary symbols in a buffer. The second block is configured to retrieve the stream of binary symbols from the buffer, determine, based at least in part on the inserted length fields, consecutive binary symbols that correspond to motion vector data, decode the consecutive binary symbols that correspond to motion vector data via a first decode path, and to decode binary symbols that correspond to other compressed image data via a second decode path that is independent of the first decode path.

Abstract: Systems and methods are provided that allow a deblocking filter and a sample adaptive offset (SAO) filter to be combined in a loop filter stage of a High Efficiency Video Coding (HEVC) decoder. In combining the deblocking filter and the SAO filter, an intermediate buffer may not be utilized, while still allowing for the deblocking filter and the SAO filter to operate substantially in parallel. The order of pixel processing and the parallelization of operation is such that the processing performed by the SAO filter need not hinder the processing performed by the deblocking filter within the loop filter stage. Additionally, and by combining the deblocking filter and the SAO filter without utilizing buffering therebetween, savings in space and cost in implementing the HEVC decoder may be realized.

Abstract: Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.

Abstract: A device for parallel symbol decoding may include a first and second block. The first block is configured to convert a bitstream into a stream of binary symbols corresponding to motion vector data and other compressed image data, insert length fields into the stream of binary symbols that are each indicative of a number of consecutive binary symbols that correspond to motion vector data, and store the stream of binary symbols in a buffer. The second block is configured to retrieve the stream of binary symbols from the buffer, determine, based at least in part on the inserted length fields, consecutive binary symbols that correspond to motion vector data, decode the consecutive binary symbols that correspond to motion vector data via a first decode path, and to decode binary symbols that correspond to other compressed image data via a second decode path that is independent of the first decode path.

Abstract: Systems and methods are provided that allow a deblocking filter and a sample adaptive offset (SAO) filter to be combined in a loop filter stage of a High Efficiency Video Coding (HEVC) decoder. In combining the deblocking filter and the SAO filter, an intermediate buffer may not be utilized, while still allowing for the deblocking filter and the SAO filter to operate substantially in parallel. The order of pixel processing and the parallelization of operation is such that the processing performed by the SAO filter need not hinder the processing performed by the deblocking filter within the loop filter stage. Additionally, and by combining the deblocking filter and the SAO filter without utilizing buffering therebetween, savings in space and cost in implementing the HEVC decoder may be realized.