Abstract: DC balance is obtained in an integrated circuit (IC) having I/O pins with AC coupling by effectively bypassing the AC coupling. The DC balance is accomplished by mixing in a known, low frequency mix signal or carrier in a circuit external to the IC and then digitally canceling out that mix signal inside the IC fabric. The mixer or modulating circuitry external to the IC can be a simple XOR gate. With the IC being an FPGA, the logic internal to the FPGA can be programmed to form the demultiplexing circuitry to digitally cancel out the mix signal, as well as to provide a carrier signal to the external mixer. To minimize errors due to data signal transitions near the edge of the carrier signal, a cleaner circuit is used to eliminate transitioning bits on either side of a carrier signal edge. With modulation used, synchronization circuitry is likewise included to provide synchronization during startup as well as after long dead times in the data signal.

Abstract: Transmission line termination circuitry is provided on a driven IC chip utilizing active transistors constructed and arranged so as to steer appropriately directed damping currents into the input bus in a manner which effectively minimizes both overshoot and undershoot without making undue demands on the normally provided chip power supply.