Abstract: A method, apparatus, and computer program product diagnosing and resolving faults is disclosed. A disclosed fault management architecture includes a fault manager suitable having diagnostic engines and fault correction agents. The diagnostic engines receive error information and identify associated fault possibilities. The fault possibility information is passed to fault correction agents, which diagnose and resolve the associated faults. The architecture uses logs to track the status of error information, the status of fault management exercises, and the fault status of system resources. Additionally, a soft error rate discriminator can be employed to track and resolve soft (correctible) errors in the system. The architecture is extensible allowing additional diagnostic engines and agents to be plugged in to the architecture without interrupting the normal operational flow of the computer system.

Abstract: A bootstrap system for a computer with peripheral devices has a first level boot firmware program and a second level boot program loaded from disk by the first level program. The second level boot program contains a device tree constructed according to IEEE-1275 (Open Firmware) standards, describing currently known peripheral devices and computer resource allocations. The device tree is modifiable during boot operations to incorporate information about additional devices. The second level boot program scans I/O buses for additional devices not included in the current device tree and loads drivers only for the additional devices. The second level boot program further allows a user to enter information into the device tree. The second level boot program is preferably implemented under DOS emulation, and may be developed in a DOS-based code development environment and ported to the computer.

Abstract: A solid state remote monitoring transmitter which transmits a 40 bit word that contains status information about a transformer via the secondary of a power distribution network to a central receiver associated with the primary (feeder) cable supplying the transformer. A program card specifies the carrier signal frequency and the identification of the transmitter. Multiple ananlog inputs are switched through a multiplexer to an A/D converter, the output of which is stored in a shift register to form the 40-bit word. The word is DPSK - coded by clock pulses in synchronism to the 60 Hz zero crossings of the AC power source and amplified by an unregulated power supply which is also powered by the AC power source. The phase transitions of the DPSK - coded word occur at the zero crossings diminishing any transients in the transmitter circuitry which would be caused by the phase transitions.