Abstract: A heat sink assembly can comprise a heat sink and a shaping element made of a shape memory material. The shaping element is incorporated into the heat sink assembly in an assembly shape. An actuation energy can cause the shape memory material to change the shaping element to an actuation shape, and the actuation shape can produce a thermal coupling shape in the heat sink. A method comprises forming a shaping element, of a shape memory material, into an actuation shape. The method includes re-forming the shaping element from the actuation shape into an assembly shape and incorporating the shaping element in a heat sink assembly that includes a heat sink. In the method, applying an actuation energy causes the shape memory material to change the shaping element from the assembly shape to the actuation shape to produce a thermal coupling shape in the heat sink.

Abstract: Fabrication of a reliable circuit board assembly with press-fit connectors is facilitated by identifying a press-fit-connector-to-circuit board connection of a circuit board assembly for testing, with one or more press-fit connector pins of the connector being press-fit into one or more corresponding plated through-holes of the circuit board at a first surface of the circuit board. An electrically insulative liquid is applied at a second surface of the circuit board to the corresponding plated through-hole(s) with the press-fit pin(s), where the second surface and the first surface are opposite surfaces of the circuit board. Connection of the press-fit pin(s) to the corresponding plated through-hole(s) is tested to identify a connection failure, where the electrically insulative liquid facilitates identifying the connection failure. A fabrication adjustment to the circuit board assembly can be identified and implemented to address the identified connection failure.

Abstract: A method adjusts a mechanical process on a material in order to improve bonding characteristics of the material. A system collects surface micro-roughness measurements of a material, and places discrete sampling regions on the material. The system analyzes the surface micro-roughness measurements for each of the discrete sampling regions on the material, and identifies a lowest micro-roughness measurement in a discrete sampling region from a plurality of discrete sampling regions on the material. The system compares the lowest micro-roughness measurement to a threshold micro-roughness measurement in order to determine that the lowest micro-roughness measurement is less than the threshold micro-roughness measurement.

Abstract: Tools and methods are provided for shaping contact tab interconnects at a circuit card edge. The tool includes a base member with a slot to receive a circuit card edge. The slot is sized such that the edge of the circuit card is slidable lengthwise within the slot. The tool further includes shaping dowels disposed within the base member, including at least two shaping dowels that define a set of adjacent shaping dowels extending at an angle relative to each other. The set of adjacent shaping dowels are exposed, at least in part, within the slot. In operation, with lengthwise sliding of the edge of the circuit card within the slot, the edge of the circuit card contacts and slides across the set of adjacent shaping dowels to round off, at least in part, ends of the contact tab interconnects at the edge of the circuit card.

Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.

Abstract: An apparatus for grounding a heat sink utilizing shape-memory alloy includes a printed circuit board, a logic chip, a heat sink, and a first grounding member, wherein the first grounding member is a shape-memory alloy. The apparatus further includes the logic chip electrically coupled to the printed circuit board and the heat sink disposed on a top surface of the logic chip. The apparatus further includes a first end of the first grounding member electrically coupled to the heat sink, wherein a second end of the grounding first member is disposed on a first ground land of the printed circuit board.

Abstract: Fabrication of a reliable circuit board assembly with press-fit connectors is facilitated by identifying a press-fit-connector-to-circuit board connection of a circuit board assembly for testing, with one or more press-fit connector pins of the connector being press-fit into one or more corresponding plated through-holes of the circuit board at a first surface of the circuit board. An electrically insulative liquid is applied at a second surface of the circuit board to the corresponding plated through-hole(s) with the press-fit pin(s), where the second surface and the first surface are opposite surfaces of the circuit board. Connection of the press-fit pin(s) to the corresponding plated through-hole(s) is tested to identify a connection failure, where the electrically insulative liquid facilitates identifying the connection failure. A fabrication adjustment to the circuit board assembly can be identified and implemented to address the identified connection failure.

Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.

Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.

Abstract: Methods for refurbishing a circuitry device are disclosed. The methods described herein include applying a first flux to solder contacts connecting a first member of a circuitry device to a second member of the circuitry device; performing a first setting process on the circuitry device with the first flux; applying a second flux to the solder contacts of the circuitry device; performing a second setting process on the circuitry device; and reflowing the solder contacts.

Abstract: A solder tail extender connector and method are provided for implementing production of solder tail extender connectors from compliant pins. A forming fixture is provided to collapse compliant pins prior to soldering. The compliant pin is collapsed at or beyond the normal compliant pin low end dimensions and removed from the forming fixture. A solder tail extender optionally is added to the collapsed compliant pin, forming the solder tail extender connector.

Abstract: A solder tail extender connector and method are provided for implementing production of solder tail extender connectors from compliant pins. A forming fixture is provided to collapse compliant pins prior to soldering. The compliant pin is collapsed at or beyond the normal compliant pin low end dimensions and removed from the forming fixture. A solder tail extender optionally is added to the collapsed compliant pin, forming the solder tail extender connector.