Patents by Inventor Timothy Patrick Pauletti
Timothy Patrick Pauletti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240107203Abstract: A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit. The measurement conditioning circuit includes a voltage sense terminal, a voltage reference terminal, and a digital measurement data output. The microcontroller circuit includes a digital measurement data input coupled with the digital measurement data output, a modulation clock input, a measurement data stream output, and a transmit select output. The transmitter circuit includes a measurement data stream input coupled with the measurement data stream output, a modulation clock output coupled with the modulation clock input, a transmit select input coupled with the transmit select output, and positive and negative output communication terminals.Type: ApplicationFiled: December 7, 2023Publication date: March 28, 2024Inventors: Timothy Patrick Pauletti, Suheng Chen
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Patent number: 11877106Abstract: A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit. The measurement conditioning circuit includes a voltage sense terminal, a voltage reference terminal, and a digital measurement data output. The microcontroller circuit includes a digital measurement data input coupled with the digital measurement data output, a modulation clock input, a measurement data stream output, and a transmit select output. The transmitter circuit includes a measurement data stream input coupled with the measurement data stream output, a modulation clock output coupled with the modulation clock input, a transmit select input coupled with the transmit select output, and positive and negative output communication terminals.Type: GrantFiled: April 29, 2022Date of Patent: January 16, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Timothy Patrick Pauletti, Suheng Chen
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Patent number: 11843251Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.Type: GrantFiled: October 27, 2021Date of Patent: December 12, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Richard Hester, Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan, Jayanth Rangaraju
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Patent number: 11689027Abstract: A controller circuit for a PV module includes a receiver circuit and a mode control and power conversion circuit. The receiver circuit receives a first signal from a transmitter circuit and changes a second signal from a first state to a second state responsive to the first signal. The mode control and power conversion circuit receives a DC voltage from a string of PV cells, receives the second signal from the receiver circuit, switches from a first mode to a second mode in response to the second signal being in the second state, converts the DC string voltage to a standby voltage in the second mode, and provides the standby voltage to DC power lines. The standby voltage is less than an operating voltage provided by the mode control and power conversion circuit in the first mode.Type: GrantFiled: April 27, 2022Date of Patent: June 27, 2023Assignee: Texas Instruments IncorporatedInventors: Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan
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Publication number: 20220263341Abstract: A controller circuit for a PV module includes a receiver circuit and a mode control and power conversion circuit. The receiver circuit receives a first signal from a transmitter circuit and changes a second signal from a first state to a second state responsive to the first signal. The mode control and power conversion circuit receives a DC voltage from a string of PV cells, receives the second signal from the receiver circuit, switches from a first mode to a second mode in response to the second signal being in the second state, converts the DC string voltage to a standby voltage in the second mode, and provides the standby voltage to DC power lines. The standby voltage is less than an operating voltage provided by the mode control and power conversion circuit in the first mode.Type: ApplicationFiled: April 27, 2022Publication date: August 18, 2022Inventors: Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan
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Publication number: 20220256259Abstract: A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit. The measurement conditioning circuit includes a voltage sense terminal, a voltage reference terminal, and a digital measurement data output. The microcontroller circuit includes a digital measurement data input coupled with the digital measurement data output, a modulation clock input, a measurement data stream output, and a transmit select output. The transmitter circuit includes a measurement data stream input coupled with the measurement data stream output, a modulation clock output coupled with the modulation clock input, a transmit select input coupled with the transmit select output, and positive and negative output communication terminals.Type: ApplicationFiled: April 29, 2022Publication date: August 11, 2022Inventors: Timothy Patrick Pauletti, Suheng Chen
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Publication number: 20220209669Abstract: A DC-DC regulator system includes a power circuit which has a first input coupled to receive an input voltage, a second input coupled to receive a control signal and an output to provide a regulated output voltage. The system includes a control circuit which has a first input coupled to receive the regulated output voltage, a second input coupled to receive a reference voltage, a first output to provide the control signal, and a second output to provide a converter clock signal. The system includes an out-of-audio circuit which has a first input coupled to receive a minimum threshold frequency signal, a second input coupled to receive the converter clock signal, a third input coupled to the power circuit output, and a fourth input coupled to receive a bandwidth control clock signal.Type: ApplicationFiled: December 29, 2020Publication date: June 30, 2022Inventors: Reza Sharifi, Timothy Patrick Pauletti, Keliu Shu, Mark Baxter Weaver
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Patent number: 11350186Abstract: A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit. The measurement conditioning circuit includes a voltage sense terminal, a voltage reference terminal, and a digital measurement data output. The microcontroller circuit includes a digital measurement data input coupled with the digital measurement data output, a modulation clock input, a measurement data stream output, and a transmit select output. The transmitter circuit includes a measurement data stream input coupled with the measurement data stream output, a modulation clock output coupled with the modulation clock input, a transmit select input coupled with the transmit select output, and positive and negative output communication terminals.Type: GrantFiled: March 16, 2020Date of Patent: May 31, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Timothy Patrick Pauletti, Suheng Chen
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Patent number: 11342787Abstract: A controller circuit for a PV module includes a receiver circuit and a mode control and power conversion circuit. The receiver circuit receives a first signal from a transmitter circuit associated with the PV module. The receiver circuit changes a second signal from a first state to a second state based the first signal. The mode control and power conversion circuit receives a DC string voltage from a string of PV cells associated with the PV module, receives the second signal from the receiver circuit, switches from a first mode to a second mode in response to the second signal being changed to the second state, converts the DC string voltage to a standby voltage in the second mode, and provides the standby voltage to DC power lines between the PV module and a DC-to-AC inverter in the second mode.Type: GrantFiled: August 14, 2019Date of Patent: May 24, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan
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Publication number: 20220069585Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.Type: ApplicationFiled: October 27, 2021Publication date: March 3, 2022Inventors: Richard Hester, Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan, Jayanth Rangaraju
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Patent number: 11265191Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: GrantFiled: July 31, 2020Date of Patent: March 1, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande
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Patent number: 11196596Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: GrantFiled: September 11, 2020Date of Patent: December 7, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande
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Patent number: 11190022Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.Type: GrantFiled: January 7, 2020Date of Patent: November 30, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Richard Hester, Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan, Jayanth Rangaraju
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Publication number: 20200412588Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: ApplicationFiled: September 11, 2020Publication date: December 31, 2020Inventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande
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Publication number: 20200366540Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: ApplicationFiled: July 31, 2020Publication date: November 19, 2020Inventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande
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Patent number: 10797921Abstract: A threshold computation circuit includes an input circuit, a maximum filter circuit, a minimum filter circuit, and a calculating circuit. The input circuit receives a discrete frequency signal from a digital filtering circuit. The discrete frequency signal is based on an S-FSK waveform received by an S-FSK receiver associated with the digital filtering circuit. The discrete frequency signal is representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. The maximum filter circuit adjusts a maximum amplitude parameter based on the discrete frequency signal and a predetermined threshold. The minimum filter circuit adjusts a minimum amplitude parameter based on the discrete frequency signal and the predetermined threshold. The calculating circuit adapts the predetermined threshold for a next data frame based on the maximum and minimum amplitude parameters. An integrated circuit and a method for computing the threshold are also disclosed.Type: GrantFiled: June 24, 2019Date of Patent: October 6, 2020Assignee: Texas Instruments IncorporatedInventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti
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Publication number: 20200303949Abstract: A controller circuit for a PV module includes a receiver circuit and a mode control and power conversion circuit. The receiver circuit receives a first signal from a transmitter circuit associated with the PV module. The receiver circuit changes a second signal from a first state to a second state based the first signal. The mode control and power conversion circuit receives a DC string voltage from a string of PV cells associated with the PV module, receives the second signal from the receiver circuit, switches from a first mode to a second mode in response to the second signal being changed to the second state, converts the DC string voltage to a standby voltage in the second mode, and provides the standby voltage to DC power lines between the PV module and a DC-to-AC inverter in the second mode.Type: ApplicationFiled: August 14, 2019Publication date: September 24, 2020Inventors: Timothy Patrick Pauletti, Suheng Chen, Amneh Mohammed Akour, Nat Maruthachalam Natarajan
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Publication number: 20200304890Abstract: A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit. The measurement conditioning circuit includes a voltage sense terminal, a voltage reference terminal, and a digital measurement data output. The microcontroller circuit includes a digital measurement data input coupled with the digital measurement data output, a modulation clock input, a measurement data stream output, and a transmit select output. The transmitter circuit includes a measurement data stream input coupled with the measurement data stream output, a modulation clock output coupled with the modulation clock input, a transmit select input coupled with the transmit select output, and positive and negative output communication terminals.Type: ApplicationFiled: March 16, 2020Publication date: September 24, 2020Applicant: Texas Instruments IncorporatedInventors: Timothy Patrick Pauletti, Suheng Chen
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Patent number: 10778482Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: GrantFiled: July 18, 2019Date of Patent: September 15, 2020Assignee: Texas Instruments IncorporatedInventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande
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Publication number: 20200259687Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.Type: ApplicationFiled: July 18, 2019Publication date: August 13, 2020Inventors: Nikolaus Klemmer, Amneh Mohammed Akour, Abhijit Anant Patki, Timothy Patrick Pauletti, Tarkesh Pande