Abstract: A non-volatile storage subsystem comprises a media I/O controller, a media access channel, and movable storage media. A non-volatile disk storage subsystem bas a read channel coupling a disk controller to a disk head assembly. A read channel interfacing subsystem is provided as part of the storage subsystem, and the read channel interfacing subsystem interfaces a disk controller to the read channel. The read channel interfacing subsystem comprises a set of process units and a pipeline manager.

Abstract: A method and circuit for controlling a FIFO buffer such that the buffer can accommodate more than one data block simultaneously without overlapping data between adjacent data blocks. The FIFO buffer has a read-pointer address register and a write-pointer address register and a bank of write-capture registers including at least a first pair and a second pair. The first pair of registers captures and saves the write-pointer addresses associated with the beginning and ending of a first data block written to the FIFO buffer register while the second pair of registers captures and saves the write-pointer addresses associated with the beginning and ending of a second data block written to the FIFO buffer. The first pair and second pair alternate in capturing and saving beginning and ending addresses of a plurality of data blocks written to the FIFO buffer.

Abstract: A method and circuit for controlling a FIFO buffer such that the buffer can accommodate more than one data block simultaneously without overlapping data between adjacent data blocks. The FIFO buffer has a read-pointer address register and a write-pointer address register and a bank of write-capture registers including at least a first pair and a second. The first pair of registers captures and saves the write-pointer addresses associated with the beginning and ending of a first data block written to the FIFO buffer register while the second pair of registers captures and saves the write-pointer addresses associated with the beginning and ending of a second data block written to the FIFO buffer. The first pair and second pair alternate in capturing and saving beginning and ending addresses of a plurality of data block written to the FIFO buffer.

Abstract: A method of data transfer in a data processing system having at least one source buffer and at least one destination buffer. The source buffer includes a plurality of data blocks, each data block having an address and being for storage of data including an identifier uniquely identifying that data block. The destination buffer includes a plurality of data blocks corresponding to the data blocks of the source buffer, each destination block having an address and being for storage of data. Each source block identifier is a function of a corresponding destination block address.