Abstract: A circuit for generating a control signal for the field deflection in a picture display device which is suitable for displaying an interlaced picture. The circuit comprises a field identification circuit, with the aid of which a distinction can be made between the two fields which form a picture, and a signal selection circuit for setting the sequence of occurrence of a first field signal which corresponds to a first field, and a second field signal which corresponds to a subsequent second field. The circuit enables a choice between a picture with or without interlace, it further being optionally possible to eliminate the interlace by shifting a field upwards or downwards relative to the other field.