Patents by Inventor Timothy R. LaRocca
Timothy R. LaRocca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11817831Abstract: A radio frequency (RF) summer circuit having a characteristic impedance Z0 comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented.Type: GrantFiled: February 27, 2023Date of Patent: November 14, 2023Assignee: Northrop Grumman Systems CorporationInventors: Eric C. Wagner, Timothy R. LaRocca
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Publication number: 20230216455Abstract: A radio frequency (RF) summer circuit having a characteristic impedance Z0 comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented.Type: ApplicationFiled: February 27, 2023Publication date: July 6, 2023Inventors: Eric C. Wagner, Timothy R. LaRocca
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Patent number: 11616477Abstract: A radio frequency (RF) summer circuit having a characteristic impedance Zo comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented.Type: GrantFiled: December 18, 2020Date of Patent: March 28, 2023Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Eric C. Wagner, Timothy R. LaRocca
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Publication number: 20220200547Abstract: A radio frequency (RF) summer circuit having a characteristic impedance Zo comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented.Type: ApplicationFiled: December 18, 2020Publication date: June 23, 2022Inventors: Eric C. Wagner, Timothy R. LaRocca
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Patent number: 10879851Abstract: An exemplary embodiment of a low noise amplifier has integral noise cancellation to provide a low noise figure and operation over a frequency range of 40 GHz-60 GHz. An amplifier amplifies an input signal as well as noise present with the amplified signal and amplified noise being out of phase and in phase, respectively, with the corresponding inputs. An auxiliary amplifier amplifies the same inputs and generates an amplified signal and amplified noise both being out of phase relative to the inputs. A summation circuit combines all of these amplified signals with the noise being cancelled since the auxiliary amplifier provides the same amount of amplification as the amplifier and the amplified noise signals being summed are 180 degrees out of phase to each other. Preferably, the amplifier, auxiliary amplifier and the summation device utilize CMOS transistors disposed on an SOI substrate with impedance stabilization over the frequency range.Type: GrantFiled: April 30, 2019Date of Patent: December 29, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Manouchehr Ghanevati, Timothy R. LaRocca, John M. Trippett
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Publication number: 20200350870Abstract: An exemplary embodiment of a low noise amplifier has integral noise cancellation to provide a low noise figure and operation over a frequency range of 40 GHz-60 GHz. An amplifier amplifies an input signal as well as noise present with the amplified signal and amplified noise being out of phase and in phase, respectively, with the corresponding inputs. An auxiliary amplifier amplifies the same inputs and generates an amplified signal and amplified noise both being out of phase relative to the inputs. A summation circuit combines all of these amplified signals with the noise being cancelled since the auxiliary amplifier provides the same amount of amplification as the amplifier and the amplified noise signals being summed are 180 degrees out of phase to each other. Preferably, the amplifier, auxiliary amplifier and the summation device utilize CMOS transistors disposed on an SOI substrate with impedance stabilization over the frequency range.Type: ApplicationFiled: April 30, 2019Publication date: November 5, 2020Inventors: Manouchehr Ghanevati, Timothy R. LaRocca, John M. Trippett
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Patent number: 10715088Abstract: A low noise amplifier has integral noise cancellation to provide a low noise figure and operation over a frequency range of 0.5 GHz-50 GHz. An amplifier amplifies an input signal as well as noise present with the amplified signal and amplified noise being out of phase and in phase, respectively, with the corresponding inputs. A feedback circuit that is non-linear with frequency enables a constant amplification. A summation circuit combines amplified signals with the noise being cancelled since two combined noise signals being summed are 180 degrees out of phase to each other. An optional secondary amplification stage provides additional amplification. Preferably, the amplifier, auxiliary amplifier and the summation device utilize CMOS transistors disposed on an SOI substrate with impedance stabilization over the frequency range.Type: GrantFiled: August 30, 2019Date of Patent: July 14, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Manouchehr Ghanevati, Timothy R. LaRocca
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Publication number: 20190187733Abstract: A high-voltage, high-speed driver circuit that includes a source amplifier having an amplifying FET device with a drain terminal, a gate terminal and a source terminal, where the amplifying FET device receiving a control signal at its gate terminal and outputs an amplified control signal at its drain terminal. The driver circuit also includes an active load having a self-biasing load FET device with a drain terminal, a gate terminal and a source terminal, where the drain terminal of the load FET device is coupled to a power supply, the source terminal of the load FET device is coupled to the drain terminal of the amplifying FET device, and the source and gate terminals of the load FET device are electrically coupled together by a self-biasing line. The active load includes a load resistor provided within the self-biasing line that provides high impedance and low capacitance.Type: ApplicationFiled: December 14, 2017Publication date: June 20, 2019Inventors: Paul L. Rodgers, Timothy R. LaRocca
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Patent number: 9991874Abstract: A tunable analog noise-cancelling transversal reconfigurable filter for filtering an RF signal. The filter includes a noise-cancelling balun responsive to the RF signal and providing gain and noise suppression, and a time delay network responsive to the signal from the balun. The time delay network includes a single continuous three-dimensional air coaxial line where a separate tap is provided between sections of the line. The filter also includes a multiplication and summing network having a plurality of multiplication stages, where each stage is fed by a voltage signal from at least one of the taps, and each stage includes a multiplication amplifier that amplifies the voltage signal. A tuning element provides a multiplication coefficient to the amplified signal. Each amplified signal in each stage is added on an output line, where the multiplication and summing network operates under Millman's Theorem.Type: GrantFiled: November 2, 2016Date of Patent: June 5, 2018Assignee: Northrop Grumman Systems CorporationInventors: Timothy R. LaRocca, Denpol Kultran