Abstract: An ion cyclotron spectrometer may include a vacuum chamber that extends at least along a z-axis and means for producing a magnetic field within the vacuum chamber so that a magnetic field vector is generally parallel to the z-axis. The spectrometer may also include means for producing a trapping electric field within the vacuum chamber that includes at least a first section that induces a first magnetron effect that increases a cyclotron frequency of an ion and at least a second section that induces a second magnetron effect that decreases the cyclotron frequency of an ion. The cyclotron frequency changes induced by the first and second magnetron effects substantially cancel one another so that an ion traversing the first and second sections will experience no net change in cyclotron frequency.

Abstract: An ion mobility spectrometer may include a flow channel having an inlet end and an outlet end. A deflection electrode is positioned within the flow channel so that a non-linear electric field is created between at least a portion of the flow channel and at least a portion of the deflection electrode when an electrostatic potential is placed across the deflection electrode and the flow channel. The ion mobility spectrometer also includes means for producing ions at a position upstream from the leading edge of the deflection electrode, so that ions produced thereby are deflected by the deflection electrode into the non-linear electric field. A detector positioned within the flow channel for detects ions from the non-linear electric field.

Abstract: An ion mobility spectrometer may include an inner electrode and an outer electrode arranged so that at least a portion of the outer electrode surrounds at least a portion of the inner electrode and defines a drift space therebetween. The inner and outer electrodes are electrically insulated from one another so that a non-linear electric field is created in the drift space when an electric potential is placed on the inner and outer electrodes. An ion source operatively associated with the ion mobility spectrometer releases ions to the drift space defined between the inner and outer electrodes. A detector operatively associated with at least a portion of the outer electrode detects ions from the drift space.

Abstract: Ion mobility spectrometer apparatus may include an ion interface that is operable to hold positive and negative ions and to simultaneously release positive and negative ions through respective positive and negative ion ports. A first drift chamber is operatively associated with the positive ion port of the ion interface and encloses an electric field therein. A first ion detector operatively associated with the first drift chamber detects positive ions from the first drift chamber. A second drift chamber is operatively associated with the negative ion port of the ion interface and encloses an electric field therein. A second ion detector operatively associated with the second drift chamber detects negative ions from said second drift chamber.

Abstract: A welding apparatus using ultrasonic sensing is described and which includes a movable welder having a selectively adjustable welding head for forming a partially completed weld in a weld seam defined between adjoining metal substrates; an ultrasonic assembly borne by the moveable welder and which is operable to generate an ultrasonic signal which is directed toward the partially completed weld, and is further reflected from same; and a controller electrically coupled with the ultrasonic assembly and controllably coupled with the welding head, and wherein the controller receives information regarding the ultrasonic signal and in response to the information optimally positions the welding head relative to the weld seam.

Abstract: The preferred embodiments of the present invention are directed to the selective phase lag and time delay of clock signals within a computer system to compensate for additional parasitic capacitance that may be added to that system because of its open architecture. More particularly, the preferred embodiments are directed to clock signal path circuits where each circuit has multiple signal paths of varying lengths. By allowing the clock signals to propagate along a particular path, phase lag or time delay is added to those clock signals. Selection of a particular path for the clock signal is made by activating electrically controlled switches which themselves are activated or deactivated by software programs that run during power-up of the computer system that determine required phase lag or time delay of those clock signals as a function of parasitic capacitance in the computer system.

Abstract: The preferred embodiments of the present invention are directed to the selective phase lag and time delay of clock signals within a computer system to compensate for additional parasitic capacitance that may be added to that system because of its open architecture. More particularly, the preferred embodiments are directed to clock signal path circuits where each circuit has multiple signal paths of varying lengths. By allowing the clock signals to propagate along a particular path, phase lag or time delay is added to those clock signals. Selection of a particular path for the clock signal is made by activating electrically controlled switches which themselves are activated or deactivated by software programs that run during power-up of the computer system that determine required phase lag or time delay of those clock signals as a function of parasitic capacitance in the computer system.

Abstract: The preferred embodiments of the present invention are directed to the selective phase lag and time delay of clock signals within a computer system to compensate for additional parasitic capacitance that may be added to that system because of its open architecture. More particularly, the preferred embodiments are directed to clock signal path circuits where each circuit has multiple signal paths of varying lengths. By allowing the clock signals to propagate along a particular path, phase lag or time delay is added to those clock signals. Selection of a particular path for the clock signal is made by activating electrically controlled switches which themselves are activated or deactivated by software programs that run during power-up of the computer system that determine required phase lag or time delay of those clock signals as a function of parasitic capacitance in the computer system.

Abstract: A method for the concurrent ultrasonic inspection of partially completed welds is disclosed and which includes providing a pair of transducers which are individually positioned on the opposite sides of a partially completed weld to be inspected; moving the transducers along the length of and laterally inwardly and outwardly relative to the partially completed weld; pulsing the respective transducers to produce an ultrasonic signal which passes through or is reflected from the partially completed weld; receiving from the respective transducers ultrasonic signals which pass through or are reflected from the partially completed welds; and analyzing the ultrasonic signal which has passed through or is reflected from the partially completed weld to determine the presence of any weld defects.

Abstract: A method for the concurrent ultrasonic inspection of partially completed welds is disclosed and which includes providing a pair of transducers which are individually positioned on the opposite sides of a partially completed weld to be inspected; moving the transducers along the length of and laterally inwardly and outwardly relative to the partially completed weld; pulsing the respective transducers to produce an ultrasonic signal which passes through or is reflected from the partially completed weld; receiving from the respective transducers ultrasonic signals which pass through or are reflected from the partially completed welds; and analyzing the ultrasonic signal which has passed through or is reflected from the partially completed weld to determine the presence of any weld defects.

Abstract: A computer system having a power supply, a backplane board and a system board includes a power supply shutdown apparatus. When an interlock pin disposed on an edge connector of the system board is not seated properly in a corresponding interlock-pin-receptacle forming a portion of a system board socket disposed on the backplane board, a shutdown circuit is actuated to produce a shutdown signal which is used for electrically isolating the power supply from the system board.