Patents by Inventor Timothy S. Hayes

Timothy S. Hayes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11911769
    Abstract: The instant disclosure provides nucleic acid amplification systems and multi-reaction analysis systems useful in the efficient processing of samples, including clinical samples. Integrated systems that include nucleic acid amplification devices functionally combined with multi-reaction analysis systems are also included. Also provided are methods for monitoring multiple concurrent nucleic acid amplification reactions that include the use of devices and systems described herein.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: February 27, 2024
    Assignee: Abbott Laboratories
    Inventors: Sonal Sadaria Nana, Eric B. Shain, Michael S. Hazell, Eric D. Yeaton, Michael Giraud, Timothy J. Patno, Ali Attarwalla, Dean Khan, Matthew J. Hayes
  • Patent number: 8927411
    Abstract: A semiconductor fuse device and a method of fabricating the fuse device including a last metal interconnect layer including at least two discrete metal conductors, an inter-level dielectric layer deposited over the last metal interconnect layer and the at least two discrete metal conductors, a thin wire aluminum fuse connecting the at least two discrete metal conductors, and a fuse opening above the aluminum fuse.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Felix P. Anderson, Timothy H. Daubenspeck, Jeffrey P. Gambino, Timothy S. Hayes, Donald R. Letourneau, Thomas L. McDevitt, Anthony K. Stamper
  • Patent number: 8921975
    Abstract: A semiconductor fuse device and a method of fabricating the fuse device including a last metal interconnect layer including at least two discrete metal conductors, an inter-level dielectric layer deposited over the last metal interconnect layer and the at least two discrete metal conductors, a thin wire aluminum fuse connecting the at least two discrete metal conductors, and a fuse opening above the aluminum fuse.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: December 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Felix P. Anderson, Timothy H. Daubenspeck, Jeffrey P. Gambino, Timothy S. Hayes, Donald R. Letourneau, Thomas L. McDevitt, Anthony K. Stamper
  • Publication number: 20140106559
    Abstract: A semiconductor fuse device and a method of fabricating the fuse device including a last metal interconnect layer including at least two discrete metal conductors, an inter-level dielectric layer deposited over the last metal interconnect layer and the at least two discrete metal conductors, a thin wire aluminum fuse connecting the at least two discrete metal conductors, and a fuse opening above the aluminum fuse.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 17, 2014
    Applicant: International Business Machines Corporation
    Inventors: Felix P. Anderson, Timothy H. Daubenspeck, Jeffrey P. Gambino, Timothy S. Hayes, Donald R. Letourneau, Thomas L. McDevitt, Anthony K. Stamper
  • Publication number: 20130320488
    Abstract: A semiconductor fuse device and a method of fabricating the fuse device including a last metal interconnect layer including at least two discrete metal conductors, an inter-level dielectric layer deposited over the last metal interconnect layer and the at least two discrete metal conductors, a thin wire aluminum fuse connecting the at least two discrete metal conductors, and a fuse opening above the aluminum fuse.
    Type: Application
    Filed: June 5, 2012
    Publication date: December 5, 2013
    Applicant: International Business Machines Corporation
    Inventors: Felix P. Anderson, Timothy H. Daubenspeck, Jeffrey P. Gambino, Timothy S. Hayes, Donald R. Letourneau, Thomas L. McDevitt, Anthony K. Stamper
  • Publication number: 20090155981
    Abstract: A method of singulating integrated circuit chips. The method includes forming, from a bottom surface of a substrate, trenches part way through the substrate in the kerf regions surrounding integrated circuit regions previously formed in the substrate; placing a top surface of the substrate on a singulation fixture having compartments, the walls of the compartments fitting into the trenches in the substrate; and thinning the bottom surface of the substrate until the individual integrated circuit regions are singulated into individual integrated circuit chips.
    Type: Application
    Filed: December 13, 2007
    Publication date: June 18, 2009
    Inventors: Stephen P. Ayotte, Timothy S. Hayes
  • Patent number: 6980937
    Abstract: A method and system for quantifying profile characteristics of semiconductor devices, including receiving profile data for a device under evaluation and isolating from the profile data a region indicating a profile edge. The profile edge data is rotated by ninety degrees to become rotated profile edge data. The non-rotated profile edge data or rotated profile edge data is then used to calculate at least one geometric parameter describing the profile edge.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: December 27, 2005
    Assignee: International Business Machines Corporation
    Inventor: Timothy S. Hayes
  • Patent number: 6864189
    Abstract: A method evaluating an integrated circuit manufacturing process first establishes a “desired” profile of a given film in a prescribed manufacturing process by first recording multiple thickness measures taken at regular intervals along a number of lines crossing a plurality of different sample production runs of the same film formed in the integrated circuit manufacturing process. Next, the invention plots the thickness measures to produce sample film profiles of the film. These sample film profiles are averaged in a statistical process to produce the desired film profile. The desired film profile is compared to an actual production run. If the actual film profile does not match the desired film profile, the integrated circuit manufacturing process used to make the actual film profile can then be adjusted to make the actual film profile match the desired film profile more closely.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: March 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Timothy S. Hayes, Michael C. Triplett
  • Publication number: 20040266035
    Abstract: A method of evaluating an integrated circuit manufacturing process first establishes a “desired” profile of a given film in a prescribed manufacturing process by first recording multiple thickness measures taken at regular intervals along a number of lines crossing a plurality of different sample production runs of the same film formed in the integrated circuit manufacturing process. Next, the invention plots the thickness measures to produce sample film profiles of the film. These sample film profiles are averaged in a statistical process to produce the desired film profile. The desired film profile is compared to an actual production run. If the actual film profile does not match the desired film profile, the integrated circuit manufacturing process used to make the actual film profile can then be adjusted to make the actual film profile match the desired film profile more closely.
    Type: Application
    Filed: June 27, 2003
    Publication date: December 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy S Hayes, Michael C Triplett
  • Patent number: 6774019
    Abstract: The present invention describes a method of forming a thin film on a substrate arranged in a deposition system comprising the step of introducing a pre-determined amount of an impurity in a confined volume in the deposition system. One or more gases are introduced into the deposition system for forming the thin film. The impurity is removed from the confined volume in a gas phase during formation of the thin film. The impurity in the gas phase is incorporated into the thin film.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Charles Augustus Choate, IV, Timothy S. Hayes, Michael Raymond Lunn, Paul R. Nisson, Dean W. Siegel, Michael C. Triplett
  • Publication number: 20040144313
    Abstract: The present invention describes a method of forming a thin film on a substrate arranged in a deposition system comprising the step of introducing a pre-determined amount of an impurity in a confined volume in the deposition system. One or more gases are introduced into the deposition system for forming the thin film. The impurity is removed from the confined volume in a gas phase during formation of the thin film. The impurity in the gas phase is incorporated into the thin film.
    Type: Application
    Filed: December 12, 2003
    Publication date: July 29, 2004
    Applicant: International Business Machines Corporation
    Inventors: Charles Augustus Choate, Timothy S. Hayes, Michael Raymond Lunn, Paul R. Nisson, Dean W. Siegel, Michael C. Triplett
  • Patent number: 6724947
    Abstract: An exemplary embodiment of the invention is a method and system for determining a radius of curvature of a two-dimensional curved feature. The system includes an image acquisition device for obtaining images of said curved feature. A processor is coupled to the image acquisition device for receiving the images and converting the images to n sets of coordinates corresponding to points on the perimeter of the curved feature. The processor chooses at least three sets of said coordinates to define at least one group and fits each set of said coordinates from each group to an equation for a circle and determines a radius of curvature by solving each equation simultaneously. A storage device is coupled to the processor for storing processor data. An output device is coupled to the processor for outputting processor data.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventor: Timothy S. Hayes
  • Publication number: 20030213433
    Abstract: The present invention describes a method of forming a thin film on a substrate arranged in a deposition system comprising the step of introducing a pre-determined amount of an impurity in a confined volume in the deposition system. One or more gases are introduced into the deposition system for forming the thin film. The impurity is removed from the confined volume in a gas phase during formation of the thin film. The impurity in the gas phase is incorporated into the thin film.
    Type: Application
    Filed: May 17, 2002
    Publication date: November 20, 2003
    Applicant: International Business Machines Corporation
    Inventors: Charles Augustus Choate, Timothy S. Hayes, Michael Raymond Lunn, Paul R. Nisson, Dean W. Siegel, Michael C. Triplett
  • Publication number: 20030108235
    Abstract: A method and system for quantifying profile characteristics of semiconductor devices, including receiving profile data for a device under evaluation and isolating from the profile data a region indicating a profile edge. The profile edge data is rotated by ninety degrees to become rotated profile edge data. The non-rotated profile edge data or rotated profile edge data is then used to calculate at least one geometric parameter describing the profile edge.
    Type: Application
    Filed: December 7, 2001
    Publication date: June 12, 2003
    Applicant: International Business Machines Corporation
    Inventor: Timothy S. Hayes