Abstract: The present disclosure describes a semiconductor wafer testing environment for routing signals used for testing integrated circuits formed onto a semiconductor wafer. The semiconductor wafer testing environment includes a semiconductor wafer tester to control overall operation and/or configuration of the semiconductor wafer testing environment and a semiconductor wafer prober to test the integrated circuits formed onto the semiconductor wafer. The semiconductor wafer prober includes a probe card having a transmission line coupler formed onto a flexible substrate. The transmission line coupler includes multiple transmission line coupling blocks that extend radially from a central point of the flexible substrate in a circular manner.

Abstract: The present disclosure describes a semiconductor wafer testing environment for routing signals used for testing integrated circuits formed onto a semiconductor wafer. The semiconductor wafer testing environment includes a semiconductor wafer tester to control overall operation and/or configuration of the semiconductor wafer testing environment and a semiconductor wafer prober to test the integrated circuits formed onto the semiconductor wafer. The semiconductor wafer prober includes a probe card having a transmission line coupler formed onto a flexible substrate. The transmission line coupler includes multiple transmission line coupling blocks that extend radially from a central point of the flexible substrate in a circular manner.

Abstract: A shielding apparatus was developed to eliminate electromagnetic waves interference (EMI) to an integrated circuit (IC) die while it is under test. The shielding apparatus comprises a conductive plate having a first and second surfaces and a central opening where the IC device is placed. The first surface includes a first EMI gasketted channel and a central cavity disposed inside of the gasketted channel. The second surface of the apparatus includes a second EMI gasketted channel and the central opening which extends through both the first and second surfaces. When the first surface mates with the surface of automatic test equipments (ATE) interface board, the first gasketted channel forms a tight seal. Similarly, when a plunger from a device handler mates with the second surface, the second EMI gasketted channel forms a seal that blocks out EMI. In this way, the IC device in the central opening of the apparatus is isolated from external EMI.