Patents by Inventor Timothy STOAKES

Timothy STOAKES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11886704
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: January 30, 2024
    Assignee: Innovations In Memory LLC
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Publication number: 20230281079
    Abstract: A method implemented by a memory controller may comprise receiving segment pointers that identify memory devices and slices for associated segments. The method may comprise identifying a most-full first one of the memory devices. The method may comprise identifying a most-empty second one of the memory devices. The method may comprise identifying one of the segments in the most-full one of the memory devices. The method may comprise moving a slice from the identified one of the segments in the most-full one of the memory devices to the most-empty one of the memory devices. The method may comprise updating one of the segment pointers for the identified segment.
    Type: Application
    Filed: February 17, 2023
    Publication date: September 7, 2023
    Applicant: Innovations in Memory LLC
    Inventors: Timothy STOAKES, Mark Lewis
  • Patent number: 11586501
    Abstract: A memory system uses a dynamic RAID scheme to dynamically encode RAID address space geometries. The dynamic RAID scheme solves issues with the algorithmic layout approach and flat virtual address space used in conventional RAID systems. The dynamic RAID scheme can be used for any RAID algorithm and does not require static mapping. In other words, there is no requirement that each strip be located in the same relative location in memory devices and there is no requirement that stripes use the same combination of memory devices.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: February 21, 2023
    Assignee: Innovations In Memory LLC
    Inventors: Timothy Stoakes, Mark Lewis
  • Patent number: 11249665
    Abstract: Apparatus, methods, and other embodiments associated with object synthesis are described. One example apparatus includes logic for identifying a block in a data de-duplication repository and for identifying a reference to the block. The apparatus also includes logic for representing a source object using a first named, organized collection of references to blocks in the data de-duplication repository and logic for representing a target object using a second named, organized collection of references. The apparatus is configured to synthesize the target object from the source object. Since synthesis may be complicated by edge cases, the apparatus is configured to account for conditions including a block in the target object needing less than all the data in a source object block, data to be used to synthesize the target object residing in a sparse hole in a data stream, and the target object needing data not present in the source object.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: February 15, 2022
    Assignee: Quantum Corporation
    Inventors: Timothy Stoakes, Andrew Leppard
  • Publication number: 20220027075
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Application
    Filed: August 9, 2021
    Publication date: January 27, 2022
    Applicant: Innovations In Memory LLC
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Publication number: 20210271546
    Abstract: A memory system uses a dynamic RAID scheme to dynamically encode RAID address space geometries. The dynamic RAID scheme solves issues with the algorithmic layout approach and flat virtual address space used in conventional RAID systems. The dynamic RAID scheme can be used for any RAID algorithm and does not require static mapping. In other words, there is no requirement that each strip be located in the same relative location in memory devices and there is no requirement that stripes use the same combination of memory devices.
    Type: Application
    Filed: May 14, 2021
    Publication date: September 2, 2021
    Inventors: Timothy STOAKES, Mark LEWIS
  • Patent number: 11086519
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 10, 2021
    Assignee: Violin Systems LLC
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Patent number: 11010247
    Abstract: A memory system uses a dynamic RAID scheme to dynamically encode RAID address space geometries. The dynamic RAID scheme solves issues with the algorithmic layout approach and flat virtual address space used in conventional RAID systems. The dynamic RAID scheme can be used for any RAID algorithm and does not require static mapping. In other words, there is no requirement that each strip be located in the same relative location in memory devices and there is no requirement that stripes use the same combination of memory devices.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: May 18, 2021
    Assignee: VIOLIN SYSTEMS LLC
    Inventors: Timothy Stoakes, Mark Lewis
  • Publication number: 20200371863
    Abstract: A memory system uses a dynamic RAID scheme to dynamically encode RAID address space geometries. The dynamic RAID scheme solves issues with the algorithmic layout approach and flat virtual address space used in conventional RAID systems. The dynamic RAID scheme can be used for any RAID algorithm and does not require static mapping. In other words, there is no requirement that each strip be located in the same relative location in memory devices and there is no requirement that stripes use the same combination of memory devices.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 26, 2020
    Applicant: Violin Systems LLC
    Inventors: Timothy STOAKES, Mark Lewis
  • Publication number: 20190265893
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Application
    Filed: May 13, 2019
    Publication date: August 29, 2019
    Applicant: Violin Systems LLC
    Inventors: Amit GARG, Timothy Stoakes, Vikas Ratna
  • Patent number: 10346045
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: July 9, 2019
    Assignee: VIOLIN SYSTEMS LLC
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Patent number: 10228858
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: March 12, 2019
    Assignee: VIOLIN SYSTEMS LLC
    Inventors: Timothy Stoakes, Vikas Ratna, Amit Garg
  • Publication number: 20170269850
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Application
    Filed: June 7, 2017
    Publication date: September 21, 2017
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Patent number: 9733836
    Abstract: A method of managing a memory system is described, the memory system having a processor with a client interface, a buffer memory, and a storage memory. A LUN (logical unit) is exposed to the client, the LUN having a memory size, and QoS specification. When the processor receives a command from the client to write data to the LUN, determining if the QoS specification includes deduplication and: if the QoS does not include deduplication, processing the command by storing the data in the storage memory and creating metadata uniquely referencing a storage location of the data that is written; or if the QoS includes deduplication, determine if deduplication is possible while meeting a latency value as specified in the QoS specification and performing deduplication.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: August 15, 2017
    Assignee: VIOLIN MEMORY INC.
    Inventors: Amit Garg, Timothy Stoakes, Vikas Ratna
  • Publication number: 20170192713
    Abstract: Apparatus, methods, and other embodiments associated with object synthesis are described. One example apparatus includes logic for identifying a block in a data de-duplication repository and for identifying a reference to the block. The apparatus also includes logic for representing a source object using a first named, organized collection of references to blocks in the data de-duplication repository and logic for representing a target object using a second named, organized collection of references. The apparatus is configured to synthesize the target object from the source object. Since synthesis may be complicated by edge cases, the apparatus is configured to account for conditions including a block in the target object needing less than all the data in a source object block, data to be used to synthesize the target object residing in a sparse hole in a data stream, and the target object needing data not present in the source object.
    Type: Application
    Filed: March 24, 2017
    Publication date: July 6, 2017
    Inventors: Timothy Stoakes, Andrew Leppard
  • Patent number: 9633032
    Abstract: Apparatus, methods, and other embodiments associated with object synthesis are described. One example apparatus includes logic for identifying a block in a data de-duplication repository and for identifying a reference to the block. The apparatus also includes logic for representing a source object using a first named, organized collection of references to blocks in the data de-duplication repository and logic for representing a target object using a second named, organized collection of references. The apparatus is configured to synthesize the target object from the source object. Since synthesis may be complicated by edge cases, the apparatus is configured to account for conditions including a block in the target object needing less than all the data in a source object block, data to be used to synthesize the target object residing in a sparse hole in a data stream, and the target object needing data not present in the source object.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: April 25, 2017
    Assignee: Quantum Corporation
    Inventors: Timothy Stoakes, Andrew Leppard
  • Patent number: 9071584
    Abstract: Example apparatus and methods concern multi-tier bandwidth-centric deduplication. One example apparatus supports inline bandwidth-centric deduplication with post-processing space-centric deduplication to improve inline bandwidth-centric deduplication and thereby reduce bandwidth requirements. One example method may include determining whether a bandwidth-centric deduplication device can satisfy a deduplication request associated with a data communication and then deciding whether to engage a space-centric deduplication device to co-operate in attempting to satisfy the request. More generally, the method includes controlling a first deduplication device to participate in bandwidth reduction and selectively controlling a second deduplication device to also participate in the bandwidth reduction.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: June 30, 2015
    Inventors: Robert LaRiviere, Timothy Stoakes
  • Patent number: 8983916
    Abstract: Embodiments associated with configurable, repeatable, data generation are described. One example method includes manipulating a redundancy parameter that controls data redundancy in binary large objects (BLOBs) to be included in a generated data set. The redundancy parameters may control variations in repeatable variable length sequences included in BLOBs. The example method also includes manipulating a parameter(s) that controls custom designed sequences included in BLOBs. With the redundancy and custom designed sequences described, the example method then generates BLOBs based, at least in part, on the redundancy parameters and the custom-designed sequences. BLOBs may include byte sequences repeated at different frequencies and configurable user-designed sequences. Manipulating the redundancy parameter, manipulating the custom-designed sequences, generating the BLOBs, and providing the BLOBS may be performed by separate processes acting in parallel.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: March 17, 2015
    Inventors: Timothy Stoakes, Craig Edward Jones
  • Patent number: 8892526
    Abstract: Apparatus, methods, and other embodiments associated with de-duplication seeding are described. One example method includes re-configuring a data de-duplication repository with a blocklet from a data de-duplication seed corpus. Reconfiguring the repository may include adding a blocklet from the seed corpus to the repository, activating a blocklet identified with the seed corpus in the repository, removing a blocklet from the repository, and de-activating a blocklet in the repository. The example method may also include re-configuring a data de-duplication index associated with the data de-duplication repository with information about the blocklet. Reconfiguring the repository and the index increases the likelihood that a blocklet ingested by a data de-duplication apparatus that relies on the repository and the index will be treated as a duplicate blocklet by the data de-duplication apparatus.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: November 18, 2014
    Inventor: Timothy Stoakes
  • Patent number: 8886616
    Abstract: Apparatus, methods, and other embodiments associated with blocklet pattern identification are described. One example method includes accessing a blocklet produced by a computerized data de-duplication parsing process before providing the blocklet to a duplicate blocklet determiner. The example method also includes hashing a portion of the blocklet to produce a pattern indicating hash and then identifying the blocklet as a pattern blocklet if the pattern indicating hash matches a pre-determined pattern indicating hash. To improve efficiency in a data de-duplication process, the blocklet pattern identifying may be performed independently from a data structure and process used by the duplicate blocklet determiner. If the blocklet is a pattern blocklet, then the method includes selectively controlling the duplicate blocklet determiner to not process the pattern blocklet. The duplicate determination is not needed because a pattern determination has already been made.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: November 11, 2014
    Inventors: Timothy Stoakes, Andrew Leppard