Patents by Inventor Timothy Tsai

Timothy Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240383489
    Abstract: Systems and methods for detecting hardware faults in computer-based feedback control systems. Multiple instances of the system control program(s) are run on system processors. System sensor data are input to each instance, and the control commands output by each instance are compared. As instantiations of the same programs receive largely the same sensor data, differences between output commands may indicate the presence of one or more hardware faults.
    Type: Application
    Filed: June 25, 2024
    Publication date: November 21, 2024
    Inventors: Timothy Tsai, Saurabh Jha, Siva Hari, Michael Sullivan
  • Patent number: 12099407
    Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: September 24, 2024
    Assignee: NVIDIA CORP.
    Inventors: Michael Sullivan, Siva Kumar Sastry Hari, Brian Matthew Zimmer, Timothy Tsai, Stephen W. Keckler
  • Patent number: 11977386
    Abstract: Techniques to generate driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. Nodes of the path are assigned a time for action to avoid collision from the node. The generated scenarios may be simulated in a computer.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: May 7, 2024
    Assignee: NVIDIA CORP.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler, Alejandro Troccoli
  • Publication number: 20230112004
    Abstract: An estimation model utilizes simulations of an autonomous vehicle and objects detected near the automated vehicle to develop estimates of tolerable frame processing latency to develop real world frame processing latency estimates for similar driving conditions. An estimation model can a minimum tolerable latency for processing the frames of image data of an object detection camera on an autonomous vehicle using the object state data of the objects detected near the autonomous vehicle. An autonomous vehicle system process can determine if the processing latency of a sensor is greater than the modeled tolerable latency for that sensor, then a safety check is failed and an alert is sent. An autonomous vehicle system process can determine if the processing latency of a sensor is greater than the modeled tolerable latency for that sensor, then the hardware resources are prioritized to the processing for that sensor.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 13, 2023
    Inventors: Siva Kumar Sastay Hari, Yu-Shun Hsiao, Timothy Tsai, Vasu Singh
  • Publication number: 20230079196
    Abstract: Techniques to generate driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. Nodes of the path are assigned a time for action to avoid collision from the node. The generated scenarios may be simulated in a computer.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 16, 2023
    Applicant: NVIDIA Corp.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler, Alejandro Troccoli
  • Patent number: 11550325
    Abstract: Techniques to generate driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. Nodes of the path are assigned a time for action to avoid collision from the node. The generated scenarios may be simulated in a computer.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: January 10, 2023
    Assignee: NVIDIA CORP.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler, Alejandro Troccoli
  • Publication number: 20220269558
    Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 25, 2022
    Applicant: NVIDIA Corp.
    Inventors: Michael Sullivan, Siva Kumar Sastry Hari, Brian Matthew Zimmer, Timothy Tsai, Stephen W. Keckler
  • Patent number: 11409597
    Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: August 9, 2022
    Assignee: NVIDIA Corp.
    Inventors: Michael Sullivan, Siva Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
  • Patent number: 11390301
    Abstract: Techniques to characterize driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. The scenarios may be characterized using a tree-based or tensor-based approach.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: July 19, 2022
    Assignee: NVIDIA Corp.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler
  • Publication number: 20210389769
    Abstract: Techniques to generate driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. Nodes of the path are assigned a time for action to avoid collision from the node. The generated scenarios may be simulated in a computer.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 16, 2021
    Applicant: NVIDIA Corp.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler, Alejandro Troccoli
  • Publication number: 20210387643
    Abstract: Techniques to characterize driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. The scenarios may be characterized using a tree-based or tensor-based approach.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 16, 2021
    Applicant: NVIDIA Corp.
    Inventors: Siva Kumar Sastry Hari, Iuri Frosio, Zahra Ghodsi, Anima Anandkumar, Timothy Tsai, Stephen W. Keckler
  • Publication number: 20210004235
    Abstract: A thread execution method in a processor includes executing original instructions of a first thread in a first execution lane of the processor, and interleaving execution of duplicated instructions of the first thread with execution of original instructions of a second thread in a second execution lane of the processor.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 7, 2021
    Applicant: NVIDIA Corp.
    Inventors: Siva Kumar Sastry Hari, Michael Sullivan, Timothy Tsai, Stephen W. Keckler
  • Patent number: 10817289
    Abstract: Software-only and software-hardware optimizations to reduce the overhead of intra-thread instruction duplication on a GPU or other instruction processor are disclosed. The optimizations trade off error containment for performance and include ISA extensions with limited hardware changes and area costs.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: October 27, 2020
    Assignee: NVIDIA Corp.
    Inventors: Siva Hari, Michael Sullivan, Timothy Tsai, Stephen W. Keckler, Abdulrahman Mahmoud
  • Publication number: 20200210276
    Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Applicant: NVIDIA Corp.
    Inventors: Michael Sullivan, Siva Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
  • Patent number: 10621022
    Abstract: A family of software-hardware cooperative mechanisms to accelerate intra-thread duplication leverage the register file error detection hardware to implicitly check the data from duplicate instructions, avoiding the overheads of instruction checking and enforcing low-latency error detection with strict error containment guarantees.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: April 14, 2020
    Assignee: NVIDIA Corp.
    Inventors: Michael Sullivan, Siva Hari, Brian Zimmer, Timothy Tsai, Stephen W Keckler
  • Publication number: 20190102180
    Abstract: Software-only and software-hardware optimizations to reduce the overhead of intra -thread instruction duplication on a GPU or other instruction processor are disclosed. The optimizations trade off error containment for performance and include ISA extensions with limited hardware changes and area costs.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 4, 2019
    Inventors: Siva Hari, Michael Sullivan, Timothy Tsai, Stephen W. Keckler, Abdulrahman Mahmoud
  • Publication number: 20190102242
    Abstract: A family of software-hardware cooperative mechanisms to accelerate intra-thread duplication leverage the register file error detection hardware to implicitly check the data from duplicate instructions, avoiding the overheads of instruction checking and enforcing low-latency error detection with strict error containment guarantees.
    Type: Application
    Filed: December 18, 2017
    Publication date: April 4, 2019
    Inventors: Michael Sullivan, Siva Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
  • Patent number: 9047311
    Abstract: Approaches for retrieving files from a replicated file system. A component receives, from a requestor, a request for a copy of a data unit. The component identifies a plurality of storage nodes that each stores a complete copy of the data unit. The component sends, to the plurality of storage nodes, an instruction to retrieve a copy of the data unit within a specified period of time. At each storage node receiving an instruction, a determination of whether the copy of the data unit may be retrieved within the specified period of time is made, and if so, the copy of the data unit is provided to the component only if the copy of the data unit was actually retrieved within the specified period. The component provides the first copy of the data unit it receives to the requestor and discards any subsequently received copies of the data unit.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: June 2, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Bandic, Filip Blagojevic, Cyril Guyot, Timothy Tsai, Qingbo Wang
  • Patent number: 8909859
    Abstract: A method and a storage system are provided for implementing a sustained large block random write performance mechanism for shingled magnetic recording (SMR) drives in a redundant array of inexpensive disks (RAID). A Solid State Drive (SSD) is provided with the SMR drives in the RAID. The SSD is used in a hot spare mode, which is activated when a large block random-write event is identified for a SMR drive in the RAID. In the hot spare mode, the SSD temporarily receives new incoming writes for the identified SMR drive. Then the identified SMR drive is updated from the SSD to restore the state of the identified SMR drive, and operations continue with normal writing only using the SMR drives in the RAID.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: December 9, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Tomohiro Harayama, Hitoshi Kamei, Takaki Nakamura, Timothy Tsai
  • Publication number: 20140156713
    Abstract: Approaches for retrieving files from a replicated file system. A component receives, from a requestor, a request for a copy of a data unit. The component identifies a plurality of storage nodes that each stores a complete copy of the data unit. The component sends, to the plurality of storage nodes, an instruction to retrieve a copy of the data unit within a specified period of time. At each storage node receiving an instruction, a determination of whether the copy of the data unit may be retrieved within the specified period of time is made, and if so, the copy of the data unit is provided to the component only if the copy of the data unit was actually retrieved within the specified period. The component provides the first copy of the data unit it receives to the requestor and discards any subsequently received copies of the data unit.
    Type: Application
    Filed: December 5, 2012
    Publication date: June 5, 2014
    Applicant: HGST Netherlands B.V.
    Inventors: Zvonimir Bandic, Filip Blagojevic, Cyril Guyot, Timothy Tsai, Qingbo Wang