Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.