Patents by Inventor Tin Wee

Tin Wee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060197623
    Abstract: A method and apparatus is presented for generating a reference voltage that biases a metal-oxide-semiconductor (MOS) transistor used as a varactor in capacitive tuning applications. In one embodiment, a biasing circuit is implemented. The biasing circuit comprises a diode-clamped FET and an element coupled to the diode-clamped FET at a connection point. The element produces a constant current through the diode-clamped FET. A voltage is produced at the connection point. The voltage is one gate overdrive plus a threshold voltage above ground or one gate overdrive plus a threshold voltage below VDD. Establishing a threshold voltage in this way enables the biasing circuit to track an ideal voltage of a varactor that is coupled to the biasing circuit through the threshold voltage.
    Type: Application
    Filed: March 3, 2005
    Publication date: September 7, 2006
    Inventors: Alvin Loke, Tin Wee, Robert Barnes, Kari Arave, Thomas Cynkar, James Pfiester