Abstract: A method for forming a semiconductor device is provided. In one embodiment, the method includes providing a semiconductor substrate with a surface region. The surface region includes one or more layers overlying the semiconductor substrate. In addition, the method includes depositing a dielectric layer overlying the surface region. The dielectric layer is formed by a CVD process. Furthermore, the method includes forming a diffusion barrier layer overlying the dielectric layer. In addition, the method includes forming a conductive layer overlying the diffusion barrier layer. Additionally, the method includes reducing the thickness of the conductive layer using a chemical-mechanical polishing process. The CVD process utilizes fluorine as a reactant to form the dielectric layer. In addition, the dielectric layer is associated with a dielectric constant equal or less than 3.3.

Abstract: A method for filling a trench includes forming a first layer in a trench in order to partially fill the trench, removing at least a potion of the first layer from the trench; and forming a second layer on the first layer, wherein the forming a second layer is performed at a temperature of at least 700 degrees C. and at a gas flow ratio of at least 1.6, the gas flow ratio being equal to a first gas flow rate for a first gas to a second gas flow rate for a second gas. In a specific embodiment, the method includes removing a contaminant from the first layer by reacting with the contaminant present in the first layer at the temperature and with the gas flow ratio. In a specific embodiment, the removing at least a portion of the first layer includes etching the portion of the first layer.

Abstract: A method for manufacturing a semiconductor device is provided. In a specific embodiment, the method includes providing a semiconductor substrate with a surface region. The surface region includes one or more layers overlying the semiconductor substrate. Additionally, the method includes forming a dielectric layer overlying the surface region and forming a diffusion barrier layer overlying the dielectric layer. Moreover, the method includes subjecting the diffusion barrier layer to a plasma environment to facilitate adhesion between the diffusion barrier layer and the dielectric layer at an interface region. Also, the method includes processing the semiconductor substrate while maintaining attachment between the dielectric layer and the diffusion barrier layer at the interface region. The subjecting the diffusion barrier layer to a plasma environment includes maintaining a thickness of the barrier diffusion layer.

Abstract: A method and apparatus for depositing a dielectric layer. The apparatus includes a semiconductor processing chamber configured for use in a dielectric layer deposition process, the semiconductor processing chamber being associated with at least a length, a width, a height, and a volume, one or more gas sources containing one or more gases used in the barrier layer deposition process, and one or more gas flow controllers coupled to the one or more gas sources, the one or more gas flow controllers configured to provide one or more controlled amounts of one or more gas flows to the semiconductor processing chamber during semiconductor processing. One or more gas lines coupled to the one or more gas flow controllers for receiving one or more gas flows from the one or more gas flow controllers, and a pumping system is coupled to the semiconductor processing chamber, the pumping system configured to remove a quantity of gas from either the semiconductor processing chamber or the one or more gas lines.

Abstract: A method for making an electrode in a semiconductor device. The method includes forming a trench in a first layer. The first layer is associated with a top surface, and the trench is associated with a bottom surface and a side surface. Additionally, the method includes depositing a diffusion barrier layer on at least the bottom surface, the side surface, and a part of the top surface, removing the diffusion barrier layer from at least a part of the bottom surface, depositing a seed layer on at least the part of the bottom surface and the diffusion barrier layer, and depositing an electrode layer on the seed layer.

Abstract: A new method for forming a silicon-on-insulator MOSFET while eliminating floating body effects is described. A silicon-on-insulator substrate is provided comprising a silicon semiconductor substrate underlying an oxide layer underlying a silicon layer. A first trench is etched partially through the silicon layer and not to the underlying oxide layer. Second trenches are etched fully through the silicon layer to the underlying oxide layer wherein the second trenches separate active areas of the semiconductor substrate and wherein one of the first trenches lies within each of the active areas. The first and second trenches are filled with an insulating layer. Gate electrodes and associated source and drain regions are formed in and on the silicon layer in each active area. An interlevel dielectric layer is deposited overlying the gate electrodes. First contacts are opened through the interlevel dielectric layer to the underlying source and drain regions.