Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.

Abstract: A circuit is provided for providing a sampling clock to de-serializers in a communication physical layer. The circuit includes a slave delay lock loop (DLL), to receive an input clock and provide the sampling clock to the de-serializers. Further, a master DLL is included for receiving the input clock and outputting a control signal to the slave DLL to adjust a delay amount of the sampling clock of the slave DLL. The master DLL replicates a circuit of the slave DLL with a loop detection and determines the control signal for output.

Abstract: A circuit is provided for providing a sampling clock to de-serializers in a communication physical layer. The circuit includes a slave delay lock loop (DLL), to receive an input clock and provide the sampling clock to the de-serializers. Further, a master DLL is included for receiving the input clock and outputting a control signal to the slave DLL to adjust a delay amount of the sampling clock of the slave DLL. The master DLL replicates a circuit of the slave DLL with a loop detection and determines the control signal for output.

Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.

Abstract: A frame decoding circuit implemented in an IC die includes a frame synchronizer, receiving an input clock signal and an input frame signal in serial form, to provide an output clock signal. A phase shift of the output clock signal is adjusted according to a detected code by sampling the input frame signal at a center point for every two bits and the detected code being not a correct type. The input clock signal is divided in frequency with the phase shift for providing the output clock signal. A de-serializer unit receives the input frame signal, the input data, the output clock signal from the frame synchronizer, a delay-locked-loop clock signal to de-serialize the input frame signal and the input data for output.