Patents by Inventor Ting-Chou Lin

Ting-Chou Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Redistribution layer routing for integrated fan-out wafer-level chip-scale packages
    Patent number: 9928334
    Abstract: A method for redistribution layer routing is proposed. The method at least comprises inputting information regarding a redistribution layer layout, at least one netlist, and a constraint file. Next, it is creating a concentric-circle model based on the information, the netlist and the constraint file. Subsequently, it is assigning at least one pre-assignment net to at least one redistribution layer according to the concentric-circle model. Finally, the redistribution layer routing is performed.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: March 27, 2018
    Inventors: Bo-Qiao Lin, Ting-Chou Lin, Chun-Yi Yang, Yao-Wen Chang
  • Redistribution Layer Routing for Integrated Fan-Out Wafer-Level Chip-Scale Packages
    Publication number: 20180032660
    Abstract: A method for redistribution layer routing is proposed. The method at least comprises inputting information regarding a redistribution layer layout, at least one netlist, and a constraint file. Next, it is creating a concentric-circle model based on the information, the netlist and the constraint file. Subsequently, it is assigning at least one pre-assignment net to at least one redistribution layer according to the concentric-circle model. Finally, the redistribution layer routing is performed.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Applicant: AnaGlobe Technology, Inc.
    Inventors: Bo-Qiao Lin, Ting-Chou Lin, Chun-Yi Yang, Yao-Wen Chang