Abstract: A method for fabricating a memory device includes: providing a substrate; forming a first dielectric layer over the substrate; forming a plurality of conductive layers and a plurality of dielectric layers alternately and horizontally disposed on the substrate; forming a channel column structure on the substrate and in the plurality of conductive layers and the plurality of dielectric layers, where a side wall of the channel column structure is in contact with the plurality of conductive layers; forming a second dielectric layer covering the first dielectric layer; and forming, in the first and second dielectric layers, a conductive column structure adjacent to the channel column structure and in contact with one of the plurality of conductive layers, where the conductive column structure includes a liner insulating layer as a shell layer.

Abstract: A method for manufacturing a semiconductor structure, a semiconductor structure, and a capacitor structure are provided. The method includes: providing a substrate, a plurality of blind holes or grooves being provided in a surface of the substrate; forming filling layers in the plurality of blind holes or grooves, top surfaces of the filling layers being flush with a top surface of the substrate; and forming a cap layer on the top surfaces of the filling layers and the top surface of the substrate, in which the cap layer includes at least a film-stacked structure, the film-stacked structure includes a first cap film and a second cap film, and a doping material source of the first cap film is different from a doping material source of the second cap film.

Abstract: A method of fabricating a semiconductor device. A wafer having a front side and a back side opposite to the front side is prepared. A plurality of through substrate vias (TSVs) is formed on the front side. A redistribution layer (RDL) is then formed on the TSVs. The wafer is bonded to a carrier. A wafer back side grinding process is performed to thin the wafer on the back side. An anneal process is performed to recrystallize the TSVs. A chemical-mechanical polishing (CMP) process is performed to polish the back side.

Abstract: A method of fabricating a semiconductor device. A wafer having a front side and a back side opposite to the front side is prepared. A plurality of through substrate vias (TSVs) is formed on the front side. A redistribution layer (RDL) is then formed on the TSVs. The wafer is bonded to a carrier. A wafer back side grinding process is performed to thin the wafer on the back side. An anneal process is performed to re-crystallize the TSVs. A chemical mechanical polishing (CMP) process is performed to polish the back side.