Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.

Abstract: Systems and methods for generating, distributing, and using performance mode BIOS configurations are disclosed. Each performance mode BIOS configuration can be a unique set of BIOS setting values that have been established to optimize a particular performance parameter or set of performance parameters, such as boot speed or operating system installation speed. Based on a given hardware configuration and/or set of performance parameters, one or more performance mode BIOS configurations can be packaged and transferred to a memory of a BMC in the form of one or more configuration payloads. The BIOS Setup Utility can display all configuration payloads, such as listed by the type of performance mode (e.g., “Boot Speed Performance Mode” and “OS Installation Performance Mode”), that are available in the BMC memory and allow a user to overwrite the memory containing the current BIOS configuration with a selected configuration payload.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.

Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.

Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A server including a rack, at least one chassis, a plurality of electronic modules, and a cable module is provided. The rack has an opening. The chassis is movably disposed in the rack along a first axis, and moves in and out the rack through the opening. The electronic modules are vertically and detachably disposed in the chassis. A plurality of channels parallel to a second axis and each of the channels is disposed between two adjacent electronic modules, and the first axis is perpendicular to the second axis. The cable module is disposed at a side of the chassis. The cable module is connected to at least one of the electronic modules. When the chassis is moved out from the rack, the electronic module connected to the cable module is next to the opening of the rack.

Abstract: A server including a rack, at least one chassis, a plurality of electronic modules, and a cable module is provided. The rack has an opening. The chassis is movably disposed in the rack along a first axis, and moves in and out the rack through the opening. The electronic modules are vertically and detachably disposed in the chassis. A plurality of channels parallel to a second axis and each of the channels is disposed between two adjacent electronic modules, and the first axis is perpendicular to the second axis. The cable module is disposed at a side of the chassis. The cable module is connected to at least one of the electronic modules. When the chassis is moved out from the rack, the electronic module connected to the cable module is next to the opening of the rack.

Abstract: A server information sending system includes a server and an optical receiving device. The server has a microprocessor and a single LED element connected the microprocessor. The microprocessor transmits some server information in series outwardly by the single LED element. Flashes having information transmitted by the single LED element includes a machine-received message for the optical receiving device and a naked-eye-received message for a user.

Abstract: A sever system with security device is disclosed, which includes a server chassis having an opening, a blade server disposed in the server chassis, and an electronic lock disposed on the blade server and opposed to the opening. The blade server has a microprocessor, and the electronic lock is connected to the microprocessor. The electronic lock passes through the opening when the electronic lock is locked.

Abstract: A fan cooling system for use with an electronic apparatus having a fan for providing a cooling draft and adapted to remove draft-borne dust includes: an input module for receiving a control instruction; a programmable logic module electrically connected to the input module and adapted to validate the control instruction received by the input module and output a logic result in accordance with the control instruction; and an electrostatic module comprising an electrostatic filtering unit and an electrostatic controlling unit electrically connected to the electrostatic filtering unit and the programmable logic module, wherein the electrostatic filtering unit adjoins the fan to take the cooling draft, and the electrostatic controlling unit applies static electricity to the electrostatic filtering unit in accordance with the logic result sent from the programmable logic module and thus enables the electrostatic filtering unit to electrostatically adsorb draft-borne dust.

Abstract: A fan operation adaptive control system is proposed, which is designed for use with an electronic system, such as a network server, for providing the network server with an adaptive operation control function; and which is characterized by the utilization of a CPLD (Complex PLD, where PLD=Programmable Logic Device) module for implementing the adaptive operation control function for various different types of fan units, including PWM-driven type (which includes 100 Hz–500 Hz, 10 KHz–50 KHz, and 1 MHz–5 MHz subtypes) and DC-driven type, such that the network server can be equipped with just one type of temperature sensor which can be used in conjunction with these various different types of fan units. This feature allows the maintenance of heat-dissipating fan units on network servers to be more convenient and cost-effective to implement than the prior art.