Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.

Abstract: A memory structure includes a pull-down transistor and a pull-up transistor stacked vertically in a Z-direction, a pass-gate transistor and a dummy transistor stacked vertically in the Z-direction, a dielectric structure, a connection structure, and a butt contact. The pull-down transistor and the pull-up transistor share a first gate structure. The pass-gate transistor and the dummy transistor share a second gate structure. The dielectric structure is between the first gate structure and the second gate structure in a Y-direction. The connection structure is over and electrically connected to the first gate structure and is over and electrically isolated from the second gate structure. The connection structure is an L-shape in a Y-Z cross-sectional view. The butt contact is directly over the connection structure and the second gate structure. The butt contact is electrically connected to the connection structure and a source/drain feature of the pass-gate transistor.

Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.

Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.

Abstract: A radio frequency (RF) front-end circuit of a wireless communication device is provided. The RF front-end circuit includes a receiving amplifier, a down-converter, an up-converter, a transmitting amplifier and an output driver, where the receiving amplifier and the down-converter are configured to process received signals according to a local oscillation (LO) signal, and the up-converter, the transmitting amplifier and the output driver are configured to process transmitted signals according to the LO signal. The receiving amplifier, the up-converter or the transmitting amplifier includes a transformer load. The transformer load includes a switchable inductor. When the wireless communication device operates in a first mode, the LO signal has a first frequency, and the switchable inductor has a first inductance. When the wireless communication device operates in a second mode, the LO signal has a second frequency, and the switchable inductor has a second inductance.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.

Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.

Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A server including a rack, at least one chassis, a plurality of electronic modules, and a cable module is provided. The rack has an opening. The chassis is movably disposed in the rack along a first axis, and moves in and out the rack through the opening. The electronic modules are vertically and detachably disposed in the chassis. A plurality of channels parallel to a second axis and each of the channels is disposed between two adjacent electronic modules, and the first axis is perpendicular to the second axis. The cable module is disposed at a side of the chassis. The cable module is connected to at least one of the electronic modules. When the chassis is moved out from the rack, the electronic module connected to the cable module is next to the opening of the rack.

Abstract: A server including a rack, at least one chassis, a plurality of electronic modules, and a cable module is provided. The rack has an opening. The chassis is movably disposed in the rack along a first axis, and moves in and out the rack through the opening. The electronic modules are vertically and detachably disposed in the chassis. A plurality of channels parallel to a second axis and each of the channels is disposed between two adjacent electronic modules, and the first axis is perpendicular to the second axis. The cable module is disposed at a side of the chassis. The cable module is connected to at least one of the electronic modules. When the chassis is moved out from the rack, the electronic module connected to the cable module is next to the opening of the rack.

Abstract: A server information sending system includes a server and an optical receiving device. The server has a microprocessor and a single LED element connected the microprocessor. The microprocessor transmits some server information in series outwardly by the single LED element. Flashes having information transmitted by the single LED element includes a machine-received message for the optical receiving device and a naked-eye-received message for a user.

Abstract: A sever system with security device is disclosed, which includes a server chassis having an opening, a blade server disposed in the server chassis, and an electronic lock disposed on the blade server and opposed to the opening. The blade server has a microprocessor, and the electronic lock is connected to the microprocessor. The electronic lock passes through the opening when the electronic lock is locked.

Abstract: A fan cooling system for use with an electronic apparatus having a fan for providing a cooling draft and adapted to remove draft-borne dust includes: an input module for receiving a control instruction; a programmable logic module electrically connected to the input module and adapted to validate the control instruction received by the input module and output a logic result in accordance with the control instruction; and an electrostatic module comprising an electrostatic filtering unit and an electrostatic controlling unit electrically connected to the electrostatic filtering unit and the programmable logic module, wherein the electrostatic filtering unit adjoins the fan to take the cooling draft, and the electrostatic controlling unit applies static electricity to the electrostatic filtering unit in accordance with the logic result sent from the programmable logic module and thus enables the electrostatic filtering unit to electrostatically adsorb draft-borne dust.