Patents by Inventor Ting-Kai Chen

Ting-Kai Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240424690
    Abstract: Disclosed is a gripping mechanism including a first bracket, a second bracket, a first guide rod, a third bracket, an actuating module, a gripping block and two grippers. The second bracket is connected to the first bracket. The third bracket is connected to the second bracket. The actuating module is disposed on the third bracket. The gripping block is slidably disposed on the third bracket and is connected to the actuating module. The two grippers are fixed on the terminal end of the third bracket distal from the first bracket and the second bracket, wherein the gripping block is located between the actuating module and the two grippers and the actuating module is adapted to drive the gripping block to slide close to or slide away from the two grippers. A mobile robot is also disclosed.
    Type: Application
    Filed: June 20, 2024
    Publication date: December 26, 2024
    Applicant: Unicom Global, Inc.
    Inventors: Sheng-Kai Lai, Wen-Yi Kuo, Wen-Hsiang Chen, Chen-Wei Yang, Ting-Cheng Sun
  • Publication number: 20240424691
    Abstract: Disclosed is a gripping mechanism including a first bracket, a second bracket, a first guide rod, a third bracket, an actuating module, a gripping block and a gripper. The second bracket is pivotally connected to the first bracket. The first guide rod is fixed on the second bracket. The third bracket is slidably connected to the first guide rod. The actuating module is disposed on the third bracket. The gripping block is slidably disposed on the third bracket, wherein the gripping block is connected to the actuating module. The gripper is fixed on the third bracket, wherein the actuating module is located between the first guide rod and the gripping block, and the gripping block is located between the actuating module and the gripper. A mobile robot is also disclosed.
    Type: Application
    Filed: June 20, 2024
    Publication date: December 26, 2024
    Applicant: Unicom Global, Inc.
    Inventors: Sheng-Kai Lai, Wen-Yi Kuo, Wen-Hsiang Chen, Chen-Wei Yang, Ting-Cheng Sun
  • Publication number: 20240409109
    Abstract: A safety driving detection and auxiliary system comprises a physiological sensing module, an alcohol detection module, a warning device and a computing device. The physiological sensing module is configured to obtain at least one piece of physiological information of a driver. The alcohol detection module is configured to detect an alcohol concentration of the driver. The warning device is configured to generate a warning signal. The computing device is connected to the physiological sensing module, the alcohol detection module and the warning device, and is configured to determine whether to actuate a vehicle controller according to the alcohol concentration of the driver, obtain a vehicle speed information from the vehicle controller, and actuate the warning device or/and control the vehicle controller at least according to the at least one piece of physiological information and the vehicle speed information.
    Type: Application
    Filed: September 13, 2023
    Publication date: December 12, 2024
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ting Kai CHEN, Chao Yuan YU, Jung-Pin WANG, Che-Yu LIN, Tai-Yu CHIANG
  • Publication number: 20240391419
    Abstract: A wireless vehicle control device, disposed on a vehicle, includes a first communication unit, at least one second communication unit and a central management unit. The first communication unit is configured to detect a first communication signal of a portable electronic device. The at least one second communication unit is configured to detect a second communication signal of the portable electronic device, wherein a communication range of the at least one second communication unit is smaller than that of the first communication unit. The central management unit is configured to activate the at least one second communication unit to perform detection when determining that the first communication unit is paired with the portable electronic device according to the first communication signal, and control at least one vehicle lock according to the first communication signal when a distance corresponding to the second communication signal is not greater than a default distance.
    Type: Application
    Filed: August 29, 2023
    Publication date: November 28, 2024
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ting Kai CHEN, Guan-Jie JHAO, Chao Yuan YU, Jung-Pin WANG, Che-Yu LIN
  • Publication number: 20240347623
    Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.
    Type: Application
    Filed: June 25, 2024
    Publication date: October 17, 2024
    Inventors: Ting-Gang Chen, Tai-Chun Huang, Ming-Chang Wen, Shu-Yuan Ku, Fu-Kai Yang, Tze-Liang Lee, Yung-Cheng Lu, Yi-Ting Fu
  • Publication number: 20240314998
    Abstract: A memory structure includes a pull-down transistor and a pull-up transistor stacked vertically in a Z-direction, a pass-gate transistor and a dummy transistor stacked vertically in the Z-direction, a dielectric structure, a connection structure, and a butt contact. The pull-down transistor and the pull-up transistor share a first gate structure. The pass-gate transistor and the dummy transistor share a second gate structure. The dielectric structure is between the first gate structure and the second gate structure in a Y-direction. The connection structure is over and electrically connected to the first gate structure and is over and electrically isolated from the second gate structure. The connection structure is an L-shape in a Y-Z cross-sectional view. The butt contact is directly over the connection structure and the second gate structure. The butt contact is electrically connected to the connection structure and a source/drain feature of the pass-gate transistor.
    Type: Application
    Filed: March 13, 2023
    Publication date: September 19, 2024
    Inventors: Cheng-Yin WANG, Szuya LIAO, Tsung-Kai CHIU, Shao-Tse HUANG, Ting-Yun WU, Wen-Yuan CHEN
  • Publication number: 20240292590
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Application
    Filed: April 22, 2024
    Publication date: August 29, 2024
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 12051735
    Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Gang Chen, Tai-Chun Huang, Ming-Chang Wen, Shu-Yuan Ku, Fu-Kai Yang, Tze-Liang Lee, Yung-Cheng Lu, Yi-Ting Fu
  • Publication number: 20240243769
    Abstract: A radio frequency (RF) front-end circuit of a wireless communication device is provided. The RF front-end circuit includes a receiving amplifier, a down-converter, an up-converter, a transmitting amplifier and an output driver, where the receiving amplifier and the down-converter are configured to process received signals according to a local oscillation (LO) signal, and the up-converter, the transmitting amplifier and the output driver are configured to process transmitted signals according to the LO signal. The receiving amplifier, the up-converter or the transmitting amplifier includes a transformer load. The transformer load includes a switchable inductor. When the wireless communication device operates in a first mode, the LO signal has a first frequency, and the switchable inductor has a first inductance. When the wireless communication device operates in a second mode, the LO signal has a second frequency, and the switchable inductor has a second inductance.
    Type: Application
    Filed: January 4, 2024
    Publication date: July 18, 2024
    Applicant: MediaTek Inc.
    Inventors: Tsung-Ming Chen, Wei-Kai Hong, Ting-Wei Liang, Wei-Pang Chao, Po-Yu Chang
  • Publication number: 20230413594
    Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.
    Type: Application
    Filed: September 4, 2023
    Publication date: December 21, 2023
    Inventors: Hui-Ru WU, Jian-Chin LIANG, Jo-Hsiang CHEN, Lung-Kuan LAI, Cheng-Yu TSAI, Hsin-Lun SU, Ting-Kai CHEN
  • Patent number: 11778845
    Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.
    Type: Grant
    Filed: May 15, 2022
    Date of Patent: October 3, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Hui-Ru Wu, Jian-Chin Liang, Jo-Hsiang Chen, Lung-Kuan Lai, Cheng-Yu Tsai, Hsin-Lun Su, Ting-Kai Chen
  • Patent number: 11656497
    Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: May 23, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Lung-Kuan Lai, Ting-Kai Chen, Jiun-Hong Lin
  • Publication number: 20220382106
    Abstract: An optical lens includes an optical transparent body which has an upper surface, a lower surface, a lateral surface and a lower concave portion. The upper surface includes a central upper concave portion, an outwardly-concave curved surface continuous from the central upper concave portion, and an inwardly-concave curved surface continuous from the outwardly-concave curved surface. The lateral surface is connected between the inwardly-concave curved surface and the lower surface. The lower concave portion is recessed from the lower surface.
    Type: Application
    Filed: May 25, 2021
    Publication date: December 1, 2022
    Inventors: Lung-Kuan LAI, Ting-Kai CHEN, Jiun-Hong LIN
  • Publication number: 20220271251
    Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.
    Type: Application
    Filed: May 15, 2022
    Publication date: August 25, 2022
    Inventors: Hui-Ru WU, Jian-Chin LIANG, Jo-Hsiang CHEN, Lung-Kuan LAI, Cheng-Yu TSAI, Hsin-Lun SU, Ting-Kai CHEN
  • Patent number: 11367849
    Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: June 21, 2022
    Assignee: Lextar Electronics Corporation
    Inventors: Hui-Ru Wu, Jian-Chin Liang, Jo-Hsiang Chen, Lung-Kuan Lai, Cheng-Yu Tsai, Hsin-Lun Su, Ting-Kai Chen
  • Patent number: 11271371
    Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: March 8, 2022
    Assignee: Lextar Electronics Corporation
    Inventors: Ting-Kai Chen, Lung-Kuan Lai, Jian-Chin Liang
  • Publication number: 20210210931
    Abstract: A light emitting device includes an edge emitting laser chip and a reflecting mirror. The edge emitting laser chip has light emitting ports arranged in parallel in a first direction. The light emitting ports emit light beams in a second direction. The reflecting mirror includes a reflecting surface used to reflect the light beams to a third direction. The first, second and third direction are perpendicular to each other. The light beams are emitted to the reflecting surface through the virtual incident plane and project first light spots on the reflecting surface. Each projected light spot has a first axis length in the first direction and a third axis length in the third direction. An interval between two immediately-adjacent light emitting ports is greater than the first axis length of one of the two projected light spots aligned with the two immediately-adjacent light emitting ports.
    Type: Application
    Filed: August 4, 2020
    Publication date: July 8, 2021
    Inventors: Ting-Kai CHEN, Lung-Kuan LAI, Jian-Chin LIANG
  • Publication number: 20200067009
    Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.
    Type: Application
    Filed: December 25, 2018
    Publication date: February 27, 2020
    Inventors: Hui-Ru WU, Jian-Chin LIANG, Jo-Hsiang CHEN, Lung-Kuan LAI, Cheng-Yu TSAI, Hsin-Lun SU, Ting-Kai CHEN
  • Patent number: 8379388
    Abstract: A server including a rack, at least one chassis, a plurality of electronic modules, and a cable module is provided. The rack has an opening. The chassis is movably disposed in the rack along a first axis, and moves in and out the rack through the opening. The electronic modules are vertically and detachably disposed in the chassis. A plurality of channels parallel to a second axis and each of the channels is disposed between two adjacent electronic modules, and the first axis is perpendicular to the second axis. The cable module is disposed at a side of the chassis. The cable module is connected to at least one of the electronic modules. When the chassis is moved out from the rack, the electronic module connected to the cable module is next to the opening of the rack.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: February 19, 2013
    Assignee: Inventec Corporation
    Inventors: Yi-Hsuan Chen, Chi-Hua Yeh, De-Yang Wu, Ting-Kai Chen, Chin-Yuan Li, Chih-Han Kuo
  • Patent number: D995454
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: August 15, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Ting-Kai Chen, Lung-Kuan Lai