Patents by Inventor Ting-Kuo Kang

Ting-Kuo Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7019545
    Abstract: The present invention utilizes wafer acceptance testing equipment to fast monitor the quality of an insulation layer. A plurality of swing time-dependent DC ramping voltages are applied to one of the electrode plates in a capacitor and each corresponding leakage current is measured to calculate each corresponding ? value. Then, a ratio of each ? value is calculated and a ?-voltage curve is plotted to actually simulate the device failure.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 28, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Kuo Kang, Yi-Fan Chen, Chia-Jen Kao
  • Patent number: 6894517
    Abstract: The present invention utilizes to wafer acceptance testing equipment to fast monitor the quality of a tunnel oxide layer. First, a control gate and a floating gate in a memory cell are electrically connected. Then a plurality of swing time-dependent DC ramping voltages are applied and each corresponding gate leakage current is measured to calculate each corresponding ? value. Finally a ratio of each ? value is calculated and a ?-gate voltage curve is plotted to actually simulate the device failure.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: May 17, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Kuo Kang, Yi-Fan Chen, Chia-Jen Kao
  • Publication number: 20050040840
    Abstract: The present invention utilizes wafer acceptance testing equipment to fast monitor the quality of an insulation layer. A plurality of swing time-dependent DC ramping voltages are applied to one of the electrode plates in a capacitor and each corresponding leakage current is measured to calculate each corresponding ? value. Then, a ratio of each ? value is calculated and a ?? voltage curve is plotted to actually simulate the device failure.
    Type: Application
    Filed: July 30, 2004
    Publication date: February 24, 2005
    Inventors: Ting-Kuo Kang, Yi-Fan Chen, Chia-Jen Kao
  • Publication number: 20040077110
    Abstract: The present invention utilizes a wafer acceptance testing equipment to fast monitor the quality of a tunnel oxide layer. First, a control gate and a floating gate in a memory cell are electrically connected. Then a plurality of swing time-dependent DC ramping voltages are applied and each corresponding gate leakage current is measured to calculate each corresponding &bgr; value. Finally a ratio of each &bgr; value is calculated and a &bgr;-gate voltage curve is plotted to actually simulate the device failure.
    Type: Application
    Filed: October 17, 2002
    Publication date: April 22, 2004
    Inventors: Ting-Kuo Kang, Yi-Fan Chen, Chia-Jen Kao