Patents by Inventor Ting-Kuo Yu

Ting-Kuo Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Receive Side Packet Aggregation
    Publication number: 20160320967
    Abstract: A system for enhanced resource utilization includes a network interface with access to memory of a device, in communication with an operating system of the device. The system receives, from the operating system, an identification of a predetermined amount of the memory for a packet buffer, store multiple packets in the allocated memory. A total size of the multiple packets is smaller than or equal to the predetermined amount of memory. The system generates a status record for each received packet stored in the allocated memory, and stores the generated status records in the allocated memory. The system also allocates a socket buffer for each packet stored in the allocated memory such that the socket buffer has reference to the corresponding packet in the allocated memory.
    Type: Application
    Filed: September 23, 2015
    Publication date: November 3, 2016
    Inventors: Predrag Kostic, Milomir Aleksic, Vahid Marandi, Stanley Siu, Ting-Kuo Yu
  • Hardware-accelerated high availability integrated networked storage system
    Patent number: 8099474
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: January 17, 2012
    Assignee: Promise Technology, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes
  • HARDWARE-ACCELERATED HIGH AVAILABILITY INTEGRATED NETWORKED STORAGE SYSTEM
    Publication number: 20100235465
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Application
    Filed: September 21, 2009
    Publication date: September 16, 2010
    Applicant: iStor Networks, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes
  • Hardware-accelerated high availability integrated networked storage system
    Patent number: 7594002
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: September 22, 2009
    Assignee: Istor Networks, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes