Abstract: A light emitting device including an epitaxial structure and a plurality of surface microstructures is provided. The epitaxial structure has a light emitting surface and a surrounding wall surface. The surrounding wall surface surrounds and is connected to the light emitting surface. The plurality of surface microstructures are separately arranged on the light emitting surface along a plurality of directions. The plurality of directions are not perpendicular to the surrounding wall surface. A light emitting device substrate including a plurality of the light emitting device is also provided.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first low dielectric constant (low-k) layer, a first metal layer, a metal cap layer, a dielectric on dielectric (DoD) layer, an etch stop layer (ESL), a second low-k layer, a metal via and a second metal layer. The dielectric constant of the first low-k layer is less than 4. The first metal layer is embodied in the first low-k layer. The first low-k layer exposes the first metal layer. The metal cap layer is disposed on the first metal layer. The DoD layer is disposed on the first low-k layer. The etch stop layer is disposed on the metal cap layer and the DoD layer. The second low-k layer is disposed above the etch stop layer. The metal via is embodied in the second low-k layer and connected to the first metal layer.

Abstract: Disclosed in the present invention is a control method for water supply during loosening and conditioning based on a neural network model and a dual parameter correction. The method comprises: establishing a neural network-based model for predicting the amount of water supplied during loosening and conditioning; predicting and distributing the total water supplied; and correcting the model based on material balance calculation and deviation. In the present application, when there is a large deviation in outlet moisture, the dual correction control system combining the material balance calculation and the moisture deviation is used for correction to improve the stability and precise control of the outlet moisture during the loosening and conditioning process.

Abstract: The operation of an automatic data input and query system is controlled by well-defined control data. The system exposes user interfaces enabling an administrator to interact with control data to modify the ongoing operation of the system. Certain control data determines the collection and treatment of data from various technology sources. A robust control interface is provided enabling the efficient and reliable adding on of new technology data sources. Once established, control data for a new technology data source may be packaged in a form for archiving or distribution. The system may support the export and import of such packages. Such packages may be created independently of the system.

Abstract: A packaging film and a preparation method thereof, and a filter chip packaging method are provided. The raw materials of the packaging film include: 20-24 parts by mass of silicon dioxide, 24-26 parts by mass of aliphatic polyurethane acrylate, 12-15 parts by mass of phenoxy resin, 5-13 parts by mass of flexible liquid epoxy resin, 10 parts by mass of bisphenol F epoxy resin, 17-19 parts by mass of curing agent, 2-5 parts by mass of photoinitiator, and 0.4-0.8 parts by mass of accelerant, where the curing agent is compounded by bisphenol F-based benzoxazine curing agent and dicyandiamide curing agent according to the mass ratio of 10:(7-9). The packaging film has excellent flexibility and adhesion, a low moisture absorption rate, and high heat resistance and is especially suitable for the packaging of filter chips.

Abstract: A method includes forming a metal layer over a dielectric layer; forming hard masks over the metal layer; etching the metal layer using the hard masks as etch mask to form metal features; selectively forming dielectric liners on opposite sidewalls of each of the metal features, while leaving surfaces of the hard masks and the dielectric layer exposed by the dielectric liners; and forming an inter-metal dielectric layer laterally surrounding the metal features.

Abstract: A nano-FET and a method of forming is provided. In some embodiments, a nano-FET includes an epitaxial source/drain region contacting ends of a first nanostructure and a second nanostructure. The epitaxial source/drain region may include a first semiconductor material layer of a first semiconductor material, such that the first semiconductor material layer includes a first segment contacting the first nanostructure and a second segment contacting the second nanostructure, wherein the first segment is separated from the second segment. A second semiconductor material layer is formed over the first segment and the second segment. The second semiconductor material layer may include a second semiconductor material having a higher concentration of dopants of a first conductivity type than the first semiconductor material layer. The second semiconductor material layer may have a lower concentration percentage of silicon than the first semiconductor material layer.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: A lighting apparatus includes an optical component housing, an optical component and a light source. The optical component housing has an optical container and an entrance opening. The entrance opening is disposed on a lateral side of the optical component housing. The optical component housing has a light escape side. The lateral side is at a different plane as the light escape side. The optical component is detachably inserted into the optical container via the entrance opening. a cover manually operable to reveal the entrance opening for inserting the optical component and operable to conceal the entrance opening. a light source. A light is emitted from the light source passing through the optical component and escaped from the light escape side.

Abstract: A solar cell module includes a first substrate, a second substrate, at least one cell unit, a first packaging film, a second packaging film, a first protective layer, a second protective layer, and a plurality of support members. The first substrate and the second substrate are disposed opposite to each other. The cell unit is disposed between the first substrate and the second substrate. The first packaging film is disposed between the cell unit and the first substrate. The second packaging film is disposed between the cell unit and the second substrate. The first protective layer is disposed between the cell unit and the first packaging film. The second protective layer is disposed between the cell unit and the second packaging film. The support members are respectively disposed between the first packaging film and the second packaging film and surround at least two opposite sides of the cell unit.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes multiple first semiconductor nanostructures over a substrate and multiple second semiconductor nanostructures over the substrate. The semiconductor device structure also includes a dielectric structure between the first semiconductor nanostructures and the second semiconductor nanostructures. The semiconductor device structure further includes a metal gate stack wrapped around the first semiconductor nanostructures and the second semiconductor nanostructures. The metal gate stack has a gate dielectric layer and a gate electrode. The gate dielectric layer extends along a sidewall of a lower portion of the dielectric structure. A topmost surface of the gate dielectric layer is between a topmost surface of the first semiconductor nanostructures and a topmost surface of the dielectric structure.

Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.

Abstract: A power module, having: a transformer pack; a top substrate mounted on the transformer pack; and two power device chips mounted on the top substrate, wherein each one of the power device chips has at least one pin connected to the transformer pack via the top substrate; wherein the transformer pack has a magnetic core, a first primary winding and a second primary winding, a first secondary winding and a second secondary winding, a first magnetic core part and a second magnetic core part, and wherein each one of the primary windings passes through the magnetic core, the first secondary winding is close to the first primary winding with the first magnetic core part in between, and the second secondary winding is close to the second primary winding with the second magnetic core part in between.

Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of metal portions, a plurality of nanosheet structures, and a plurality of isolation structures. The metal portions are disposed on the semiconductor substrate and are spaced apart from each other. The nanosheet structures are surrounded by the metal portions such that the nanosheet structures are spaced apart from each other. The isolation structures are disposed on the semiconductor substrate such that two adjacent ones of the metal portions are isolated from each other by a corresponding one of the isolation structures. Each of the isolation structures includes a first dielectric layer and an air gap surrounded by the first dielectric layer.

Abstract: According to one embodiment, a method, computer system, and computer program product for adjusting an audible area of an avatar's voice is provided. The present invention may include receiving, at a microphone, a source audio; creating a received audio; calculating, by a generative model, a voice propagation distance of a user based on the source audio, the received audio, and a templated text sentence describing a category of a mixed reality environment experienced by the user; drawing a virtual circle within the mixed reality environment centered on a user avatar representing the user and with a radius equal to the voice propagation distance; and transmitting the source audio to one or more participants within the mixed-reality environment represented by one or more participant avatars located within the virtual circle.

Abstract: A power-free passive stabilizing device working at an interface of different media includes a hollow chamber body, a limiting structure and a valve cover. The hollow chamber body has a first end, a second end, a first opening at the first end and a second opening at the second end. The limiting structure is connected to the first end of the hollow chamber body. The valve cover is limited by the limiting structure and movably disposed on the first end of the hollow chamber body to close and open the first opening. A passive stabilizing system using the passive stabilizing device is also disclosed.

Abstract: Embodiments of the present disclosure provide enhanced system and methods for implementing generative converting 3D face landmarks. An enhanced disclosed system and non-limiting method effectively renders a third 3D face model of a first user that enables a second user to easily recognize the first user, where the second user is only familiar with a first face model that is significantly changed in a second face model of the first user in a current interaction of the first user and second user. This method effectively renders the third 3D face model of the first user that can gradually change from the first face model to the second face model, and can be easily recognized by the second user.

Abstract: A method for manufacturing a semiconductor device includes: preparing a conductive structure that includes a plurality of conductive features, adjacent two of which are spaced apart from each other by a corresponding one of a plurality of recesses; conformally forming a dielectric capping layer on the conductive structure; forming a dielectric cover layer on the dielectric capping layer to fill the recesses; and removing a portion of the dielectric cover layer and a portion of the dielectric capping layer to expose the conductive features, so as to form a plurality of spacer features respectively filled in the recesses; wherein each of the dielectric capping layer and the dielectric cover layer is made of a dielectric material doped with metal oxide.