Abstract: An electronic device comprises a display and a controller. The controller is configured to provide a first frequency refresh rate to the display. The controller is also configured to generate a control signal configured to control emission of a light emitting diode of a display pixel of the display at a second frequency based on whether the first frequency refresh rate of the display is less than a predetermined threshold value.

Abstract: An electronic device includes a display and a sensor underneath the display. The display has a full pixel density region and a reduced pixel density region. Compared to pixels in the full pixel density region, pixels in the reduced pixel density region can be controlled using overdriven power supply voltages, overdriven scan control signals, different initialization and reset voltages, and can include capacitors and transistors with different physical and electrical characteristics. Gate drivers provide scan signals to pixels in the full pixel density region, whereas overdrive buffers provide overdrive scan signals to pixels in the reduced pixel density region. The pixels in the full pixel density region and the pixels in the reduced pixel density region can be controlled using different black level or gamma settings for each color channel and can be adjusted physically to match luminance, color, as well as to mitigate differences in temperature and aging impact.

Abstract: An electronic device for assisting driver in recording images is introduced. In the electronic device, a panoramic camera unit is installed on a transportation vehicle to capture an initial video. A positioning unit detects a real-time location of the transportation vehicle. A database stores scenic spot information including multiple scenic spot locations. An intelligence processing unit receives the initial video and uses artificial intelligence to identify a user's image and an image of the scenic spot to be locked at the scenic spot location. The intelligence processing unit receives the real-time location and determines the direction of travel. The intelligence processing unit reads the scenic spot information and determines a viewing range of the transportation vehicle entering the scenic spot location based on the real-time location and the direction of travel to capture a time period within the viewing range from the initial video and crop a recorded video.

Abstract: A method for detecting an object containing recycled plastic materials by qualitative and semi-quantitative detections is revealed, in which observing a yellowing condition of the object using a first light source, and illuminating the object using a second light source for observing a defect amount on the surface image of the object. When a yellowing index of the object is smaller than a standard yellowing index as well as a second defect condition is greater than a first defect condition, and an activation energy value of the object from a thermogravimetric analyzer is smaller than a standard activation energy value, the object does contain recycled plastic materials. Since the spectrums of recycled PET and native PET are different, the object contains recycled PET and the proportion of the recycled PET are determined according to the spectrums of fluorescent spectrum analysis and the difference ratio between the spectrums respectively.

Abstract: A method for modulating signal quality of an optical modulation communication system comprising an optical modulating device is disclosed herein. An optical modulating device includes an optical splitter, an optical phase modulator and an optical combiner. The optical splitter splits an inputting optical signal by an optical splitting ratio to generate a first split optical signal and a second split optical signal. The optical phase modulator phase modulates the first split optical signal and the second split optical signal to respectively generate a first modulating optical signal and a second modulating optical signal. The optical combiner combines the first modulating optical signal and the second modulating optical signal by a combining ratio to generate an outputting optical signal having a desired chirp, the combining ratio being equal to the optical splitting ratio, the combining ratio being a positive number, and being less than one or more than one.

Abstract: The problem of forming a deep trench isolation structure suitable for photodetectors with small pitch is solved by a process in which a grid of trenches is etched from the front side using high energy plasma followed by annealing. The trenches are filled with an oxide followed by etching to recess the oxide. The trench recesses are filled with semiconductor to form a grid-shaped semiconductor structure. After FEOL processing, BEOL processing, attachment to a second substrate, and thinning from the back side, an etch removes the oxide from the back side. The etch stops on the grid-shaped semiconductor structure. The trenches are then lined and filled from the back side. The front side etch allows the trenches to be made narrow and with highly vertical sidewalls. Lining and filling the trenches from the back side provides good optical and electrical isolation.

Abstract: In an embodiment, a device includes: a magnetoresistive random access memory (MRAM) array including MRAM cells arranged in rows and columns, where a first column of the columns includes: first bottom electrodes arranged along the first column; first magnetic tunnel junction (MTJ) stacks over the first bottom electrodes; a first shared electrode over each of the first MTJ stacks; second bottom electrodes arranged along the first column; second MTJ stacks over the second bottom electrodes; a second shared electrode over each of the second MTJ stacks; and a bit line electrically connected to the first shared electrode and the second shared electrode.

Abstract: A package structure is provided. The package structure includes a substrate, an electrode layer, a lighting unit, a wall, and a package compound. The substrate and the wall that is disposed on the substrate jointly define an accommodating space. The lighting unit in the accommodating space and is electrically connected to the electrode layer disposed on the substrate. The package compound covers the electrode layer, and the lighting unit. The package compound includes an attaching portion disposed on a top surface of the lighting unit and a surrounding portion that is arranged around the attaching portion. The surrounding portion has an annular slot arranged on a top surface thereof. A bottom end of the annular slot is located at a position aligning with 25%˜90% of a thickness of the lighting diode along a height direction.

Abstract: An antenna device includes a differential-line, a first metal and a second metal. The differential-line includes a first line and a second line. The first metal and second metal are coupled to the first line and second line respectively. The first metal and second metal have different shapes and/or different sizes. The first metal and second metal form symmetric or asymmetric dipole. The first metal and second metal can be disposed on the same plane or different planes, can be electrically insulated and can have a first slot and a second slot respectively. The antenna device can further include a base coupled to the first line and second line. The base can be a daughter board having a front-end module or not. The IC package in daughter board can have different sizes. The daughter board can be offset by different distances and can be coupled to a mother board.

Abstract: Provided is a method of forming a ferroelectric memory device including: forming a ferroelectric layer between a gate electrode and a channel layer by a first atomic layer deposition (ALD) process. The first ALD process includes: providing a first precursor during a first section; and providing a first mixed precursor during a second section, wherein the first mixed precursor includes a hafnium-containing precursor and a zirconium-containing precursor. In this case, the ferroelectric layer is directly formed as Hf0.5Zr0.5O2 with an orthorhombic phase (O-phase) to enhance the ferroelectric polarization and property.

Abstract: The present disclosure provides compositions and vectors comprising a transgene(s) encoding more than one isoform of Crumbs homologue-1 (CRB1) (e.g., CRB1-A and CRB1-B), and compositions thereof, for use in the treatment or prevention of CRB1-related diseases and disorder (e.g., autosomal recessive retinitis pigmentosa (RP) and Leber congenital amaurosis (LCA)).

Abstract: A memory array device includes an array of memory cells located over a substrate, a memory-level dielectric layer laterally surrounding the array of memory cells, and top-interconnection metal lines laterally extending along a horizontal direction and contacting a respective row of top electrodes within the memory cells. Top electrodes of the memory cells are planarized to provide top surfaces that are coplanar with the top surface of the memory-level dielectric layer. The top-interconnection metal lines do not extend below the horizontal plane including the top surface of the memory-level dielectric layer, and prevent electrical shorts between the top-interconnection metal lines and components of memory cells.

Abstract: A method for manufacturing an electronic device includes the following steps: providing a carrier and a circuit substrate, wherein the carrier includes a plurality of spacers, the circuit substrate includes a plurality of electronic units, and the electronic units are detected and determined to be normal or defective; providing cover units on the carrier; disposing the circuit substrate on the cover units so that the spacers support the circuit substrate, wherein there is a gap between the circuit substrate and the cover units, and the cover units correspond to the electronic units determined to be normal; vacuuming the gap between the circuit substrate and the cover units; moving the spacers to make the cover units and the circuit substrate contact each other; and pressing the cover units and the circuit substrate to fix the cover units and the circuit substrate to each other.

Abstract: A semiconductor structure includes a semiconductor-on-insulator (SOI) substrate including a handle substrate, a buried insulating layer, and a top semiconductor layer; a first deep trench isolation structure that vertically extends through the top semiconductor layer and the buried insulating layer, and includes a first inner insulating liner laterally surrounding a first portion of the top semiconductor layer that is located in a first device region in a plan view, a first non-insulating moat structure laterally surrounding the first inner insulating liner, and a first outer insulating liner that laterally surrounds the first non-insulating moat structure; and a resistive memory array located on the first portion of the top semiconductor layer, and located entirely within the first device region in the plan view.

Abstract: An electronic device is provided. The electronic device includes a semiconductor die. The semiconductor die has a first region of a first functional cell close to the peripheral edge of the semiconductor die. The semiconductor die includes a semiconductor substrate, a first signal bump, and a first power bump. The first signal bump and the first power bump are disposed on opposite surfaces of the semiconductor substrate and electrically connected to the first functional cell. The first signal bump and the first power bump both overlap the first region.

Abstract: The present disclosure provides systems, methods, and compositions for prime-editing modification of c.828 splice site mutations in the peripherin-2 gene. Particularly the present disclosure provides systems, methods, and compositions for correcting one or more disease-causing splice site mutations selected from: c.828+3A>T, c.828+1G>A, c.828+2T>C, c.828+1G>T, and combinations thereof.

Abstract: The present application discloses a crosstalk elimination method and a playback system for crosstalk elimination. The method includes steps: inputting a first test signal into a signal processor via an audio source input cable; detecting a first crosstalk signal generated by a second speaker and caused by a first test signal when the signal processor transmitting the first test signal to the first speaker; reversing the detected first crosstalk signal to a first reversed signal having equal volume and opposite phase, wherein when the signal processor transmits the first test signal to the first speaker again, the second speaker receives the first crosstalk signal and emits a first crosstalk sound, the first reversed signal is transmitted to the second speaker to emit a first reversed phase sound, and the first reversed phase sound eliminates the first crosstalk sound.

Abstract: A method for forming a semiconductor structure is provided. The method includes providing a semiconductor substrate with a tunnel dielectric layer, a conductive layer and a hard mask layer; etching the semiconductor layer, the tunnel dielectric layer, the conductive layer and the hard mask layer to define stack structures and trenches; forming a liner on the sidewalls of the stack structures; forming an isolation structure in the trenches; removing the hard mask layer to form openings exposing the conductive layer; filling the openings with a conductive material to form a floating gate which includes a lower portion covered by the liner and an upper portion not covered by the liner; recessing the isolation structure to expose the sidewalls of the upper portion of the floating gate; forming an inter-gate dielectric (IGD) layer on the isolation structure and the floating gate; and forming a control gate on the IGD layer.

Abstract: The method for forming the semiconductor structure includes the following steps. A substrate that is divided into a cell region and a peripheral region is provided. A bottom dielectric layer is formed on the substrate. A first stacked structure and a second stacked structure are formed on the bottom dielectric layer. The first stacked structure is disposed in the cell region and the second stacked structure is disposed in the peripheral region. The first stacked structure is patterned to form first conductive stacks. A first cleaning process is performed. A first repair dielectric layer is formed on the first conductive stacks, the second stacked structure, and the bottom dielectric layer. The second stacked structure is patterned to form second conductive stacks. A second cleaning process is performed. A second repair dielectric layer is formed on the first conductive stacks, the second conductive stacks, and the bottom dielectric layer.

Abstract: In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode.