Patents by Inventor Ting-Wei Lin

Ting-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10446555
    Abstract: An integrated circuit includes a semiconductor substrate, an isolation region extending into, and overlying a bulk portion of, the semiconductor substrate, a buried conductive track comprising a portion in the isolation region, and a transistor having a source/drain region and a gate electrode. The source/drain region or the gate electrode is connected to the buried conductive track.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Hui-Zhong Zhuang, Jung-Chan Yang, Ru-Gun Liu, Shih-Ming Chang, Ya-Chi Chou, Yi-Hsiung Lin, Yu-Xuan Huang, Yu-Jung Chang, Guo-Huei Wu
  • Publication number: 20190279975
    Abstract: A layout includes a plurality of cells and at least one dummy gate electrode continuously extends across the cells. Since the dummy gate electrode is electrically conductive, the dummy gate electrode can be utilized for interconnecting the cells. That is, some signals may travel through the dummy gate electrode rather than through a metal one line or a metal two line.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 12, 2019
    Inventors: Chung-Te Lin, Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien
  • Patent number: 10390705
    Abstract: The present invention is directed to a device which includes the following features: a light source illuminates a target to generate an optical inspection signal; a probe head provides an optical path for the optical inspection signal; a probe tube arranged at a front end of the probe head; at least one switched filter module arranged in the optical path, allowing the optical inspection signal to pass therethrough to generate a corresponding spectral signal; and an image sensor arranged behind the switched filter module, receiving the spectral signal and generating a spectral image. The spectral image can be transmitted to an external device, wherefrom the user can use the spectral image to examine the target in further detail. The present invention features a rotary-type or movable-type switched filter module, which facilitates the user to switch filters easily during optical inspection.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: August 27, 2019
    Assignee: National Chiao Tung University
    Inventors: Mang Ou-Yang, Ting-Wei Huang, Chin-Siang Yang, Yao-Fang Hsieh, Sing-Tsung Li, Jin-Chern Chiou, Ming-Hsui Tsai, Jeng-Ren Duann, Yung-Jiun Lin, Shuen-De Wu, Yung-Jhe Yan, Zheng-Lin He
  • Patent number: 10386510
    Abstract: An earthquake detection system includes an earthquake data receiving module, for receiving a plurality of earthquake data and generating an earthquake parameter according to the plurality of earthquake data; a threshold value setting module, for setting an earthquake threshold according to the earthquake parameter; and an earthquake detector, for determining whether a new earthquake data belongs to an earthquake event according to the earthquake threshold when the new earthquake data is received, in order to generate a determination result; wherein the threshold value setting module further adjusts the earthquake threshold according to the determination result.
    Type: Grant
    Filed: March 22, 2015
    Date of Patent: August 20, 2019
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Shieh-Kung Huang, Hung-Wei Chiang, Pei-Yang Lin, Ting-Yu Hsu, Kung-Chun Lu
  • Publication number: 20190252367
    Abstract: An integrated circuit includes at least one first active region, at least one second active region adjacent to the first active region, and a plurality of third active regions. The first active region and the second active region are staggered. The third active regions are present adjacent to the first active region, wherein the third active regions are substantially aligned with each other.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Inventors: Chung-Te Lin, Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien
  • Publication number: 20190254178
    Abstract: A display device and a manufacturing method thereof are provided. The manufacturing method of the display device includes following steps: assembling a protection substrate and a display panel, wherein the protection substrate has an inner surface, facing a first surface of the display panel, and an end portion extends towards the display panel; assembling a device component and the display panel disposed between the device component and the protection substrate, wherein the device component has a component side surface, the display panel has a side surface, and a gap is formed among the end portion, the component side surface and the side surface; extending a dispensing extending portion to the gap; and dispensing an adhesive to the side surface and the component side surface to form an adhesive layer.
    Type: Application
    Filed: January 21, 2019
    Publication date: August 15, 2019
    Inventors: Chien-Wei CHEN, Tung-Chin WU, Ting-Hsuan LIN, Chih-Chiao YANG
  • Patent number: 10373333
    Abstract: An interactive clothes and accessories fitting method, a display system and a computer-readable recording medium thereof are provided, where the method includes the following steps. While the user is wearing a first apparel, images of the user are continuously captured by using an image capturing device to generate a first image sequence, wherein each first image that forms the first image sequence respectively corresponds to a different pose of the user. While the user is wearing a second apparel, images of the user are continuously captured by using the image capturing device. When a second comparison image corresponding to a specific pose of the user is captured by the image capturing device, a first comparison image corresponding to the specific pose is searched from the first image sequence, and the first comparison image and the second comparison image are simultaneously displayed on a screen.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: August 6, 2019
    Assignee: Wistron Corporation
    Inventors: Jie-Ci Yang, Meng-Chao Kao, Ting-Wei Lin, Hui-Chen Lin, Yu-Ting Li
  • Publication number: 20190237010
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventors: Chin-Wei Lin, Shyuan Yang, Chuang Qian, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Publication number: 20190225979
    Abstract: Provided is an influenza mucosal vaccine composition and preparation and application thereof. This composition contains an antigen fusion protein which includes an influenza virus antigen and a Type IIb heat-labile enterotoxin A subunit from Escherichia coli. Immunization with this antigen fusion protein induces cellular and humoral immune responses, including systemic and mucosal immune responses, against a specific influenza virus in a subject, and therefore protects the subject from viral infection.
    Type: Application
    Filed: August 3, 2018
    Publication date: July 25, 2019
    Inventors: Suh-Chin Wu, Shi-Wei Lin, Neos Tang, Ting-Hsung Chen
  • Publication number: 20190221624
    Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.
    Type: Application
    Filed: March 26, 2019
    Publication date: July 18, 2019
    Inventors: Chin-Wei Lin, Stephen S. Poon, Warren S. Rieutort-Louis, Cheng-Ho Yu, ChoongHo Lee, Doh-Hyoung Lee, Ting-Kuo Chang, Tsung-Ting Tsai, Vasudha Gupta, Younggu Lee
  • Publication number: 20190199911
    Abstract: A lens detection system includes a system chip, and the system chip includes a first lens selection pin and a protocol path pin. A lens detection method includes performing a reset step by the system chip; enabling the first lens selection pin by the system chip; detecting a first lens identification code via the protocol path pin by the system chip; loading first lens data by the system chip and entering a first lens operation mode for controlling an externally connected first lens if the first lens identification code is detected; and disabling the first lens selection pin by the system chip if the first lens identification code is undetected.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: Chien-Ming Yeh, Ting-Chia Chang, Ren-Wei Lin, Wen-Yuan Li
  • Publication number: 20190198403
    Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 27, 2019
    Inventors: Shang-Wei FANG, Jing-Sen WANG, Yuan-Yao CHANG, Wei-Ray LIN, Ting-Hua HSIEH, Pei-Hsuan LEE, Yu-Hsuan HUANG
  • Patent number: 10332889
    Abstract: A method of manufacturing a semiconductor device is provided, which includes the steps of providing a capacitor structure, forming a conductive layer on the capacitor structure, performing a hydrogen doping process to the conductive layer, forming a metal layer on the conductive layer after the hydrogen doping process, and patterning the metal layer and the conductive layer to forma top electrode plate.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: June 25, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Ger-Pin Lin, Tien-Chen Chan, Shu-Yen Chan, Chi-Mao Hsu, Shih-Fang Tzou, Ting-Pang Chung, Chia-Wei Wu
  • Patent number: 10331838
    Abstract: A layout method is disclosed that includes: placing function cells in a layout, corresponding to at least one design file, of an integrated circuit; and inserting at least one fill cell that is configured without cut pattern to fill at least one empty region between the function cells each comprising at least one cut pattern on at least one edge abutting the at least one empty region.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: June 25, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jung-Chan Yang, Hui-Zhong Zhuang, Ting-Wei Chiang, Yun-Xiang Lin, Tien-Yu Kuo, Shu-Yi Ying
  • Patent number: 10325900
    Abstract: A layout includes a plurality of cells and at least one dummy gate electrode continuously extends across the cells. Since the dummy gate electrode is electrically conductive, the dummy gate electrode can be utilized for interconnecting the cells. That is, some signals may travel through the dummy gate electrode rather than through a metal one line or a metal two line. Therefore, an amount of metal one lines and/or metal two lines for interconnecting the cells can be reduced.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chung-Te Lin, Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien
  • Publication number: 20190172761
    Abstract: A pixel structure includes at least one sub-pixel. The sub-pixel includes a substrate, a first micro light-emitting element, a repair micro light-emitting element, a first connecting line, a second connecting line, and a bridge pattern. The first micro light-emitting element is disposed on the substrate. The repair micro light-emitting element is disposed on the first micro light-emitting element and partially overlaps the first micro light-emitting element in a vertical direction of the substrate. The first connecting line is electrically connected to a first electrode of the first micro light-emitting element and a third semiconductor layer of the repair micro light-emitting element. The second connecting line is electrically connected to a second electrode of the first micro light-emitting element.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Inventors: Ting-Wei GUO, Cheng-Chieh CHANG, Chen-Chi LIN, Yi-Cheng LIU
  • Patent number: 10312309
    Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: June 4, 2019
    Assignee: Apple Inc.
    Inventors: Chin-Wei Lin, Stephen S. Poon, Warren S. Rieutort-Louis, Cheng-Ho Yu, ChoongHo Lee, Doh-Hyoung Lee, Ting-Kuo Chang, Tsung-Ting Tsai, Vasudha Gupta, Younggu Lee
  • Patent number: 10304378
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: May 28, 2019
    Assignee: Apple Inc.
    Inventors: Chin-Wei Lin, Shyuan Yang, Chuang Qian, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Patent number: 10296798
    Abstract: A system of selecting a keyframe for iterative closest point (ICP) includes a reference frame selector that generates a reference frame according to a current frame and a current keyframe; an ICP loop unit that performs ICP on the reference frame and the current frame, thereby generating a pose of the current frame; and a keyframe update unit that generates a new keyframe according to an offset condition between the pose of the current frame and a pose of the reference frame.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: May 21, 2019
    Assignees: NCKU Research and Development Foundation, Himax Technologies Limited
    Inventors: Ming-Der Shieh, Chun-Wei Chen, Ting-Yu Lin, Der-Wei Yang
  • Patent number: RE47419
    Abstract: A liquid crystal display device includes a support frame having a bottom wall, and a main surrounding wall extending upwardly from and formed integrally as one piece with the bottom wall. The bottom wall and the surrounding wall cooperatively define a receiving space. The bottom wall includes a first support disposed in the receiving space. The main surrounding wall includes a second support disposed in the receiving space and spacedly above the first support. A backlight module is supported on the first support. A liquid crystal display panel is supported on the second support so that the liquid crystal display panel is positioned above the backlight module.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: June 4, 2019
    Assignee: Wistron Corporation
    Inventors: Ching-Fu Hsu, Tzu-Wei Lin, Lien-Te Kao, Chi-Yeh Lu, Ming-Hung Pan, Ming-Chen Lin, Min-Wei Lin, Ting-Feng Chen, Wan-Bing Xia, Kai-Cheng Yen, Meng Zhang