Patents by Inventor Ting Yuan

Ting Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12258651
    Abstract: A method for extracting germanium based on acid decomposition is provided, including acid decomposition and post-treatment steps, and specifically including: adding an acid to a coal ash for conditioning to obtain a material a; heating the material a to 350° C. to 800° C., and keeping the material a at this temperature for 10 min to 10 h to obtain an acid-decomposed material b; milling the acid-decomposed material b until more than 60% of a milled material has a particle size of less than 200 mesh to obtain a material c; subjecting the material c to distillation to obtain a residual slurry d and a distillation fraction e; and hydrolyzing the distillation fraction e with a dilute hydrochloric acid solution, and then oven-drying to obtain GeO2.
    Type: Grant
    Filed: September 27, 2024
    Date of Patent: March 25, 2025
    Assignee: KUNMING METALLURGICAL RESEARCH INSTITUTE CO., LTD.
    Inventors: Xiaocai He, Huixian Shi, Jiuyang Ren, Na Xu, Ye Yuan, Qingxin Xu, Yina Li, Qiugu He, Ting Ren, Yuan Xu, Weizhi Diao, Sen Yan, Hui Zhang
  • Publication number: 20250098162
    Abstract: A memory device includes, from bottom to top, a substrate, a laminated layer and a stacked structure. Vertical channel pillars penetrate through the stacked structure and the laminated layer. First isolation structures are disposed aside the vertical channel pillars and penetrate through a lower part of the stacked structure. Second isolation structures are disposed over the first isolation structures and penetrate through an upper part of the stacked structure. Common source lines are disposed aside the vertical channel pillars and penetrate through the stacked structure and part of the laminated layer. From a top view, the common source lines extend in a first direction. Each of the first and second isolation structures has, in the first direction, two wide end portions respectively adjacent to two common source lines. The memory device may be applied in the process of manufacturing a 3D NAND flash memory with high capacity and high performance.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Ting-Feng Liao, Mao-Yuan Weng, Kuang-Wen Liu
  • Publication number: 20250096203
    Abstract: A manufacturing method of a semiconductor package includes the following steps. A first lower semiconductor device and a second lower semiconductor device are provided. A plurality of first conductive pillars are formed on the first lower semiconductor device along a first direction parallel to a side of the first lower semiconductor device. A plurality of second conductive pillars are formed on the second lower semiconductor device along a second direction parallel to a side of the second lower semiconductor device, wherein the first direction is substantially collinear with the second direction. An upper semiconductor device is disposed on the first lower semiconductor device and the second lower semiconductor device and revealing a portion where the plurality of first conductive pillars and the plurality of second conductive pillars are disposed.
    Type: Application
    Filed: November 7, 2024
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo-Lung Pan, Ting Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
  • Publication number: 20250076370
    Abstract: An IC test method, comprising: electrically connecting a circuit board to a first IC; generating a first test signal to test the first IC; electrically connecting the circuit board to a first adaption board, and electrically connecting a second IC to the first adaption board, wherein a first connection mechanism between the first IC and the circuit board and a second connection mechanism between the second IC and the circuit board are different; and generating a second test signal to test the second IC by the control IC.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 6, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Jian-Xing Huang, Ting-Ying Wu, Chin-Yuan Lo, Hsin-Hui Lo
  • Publication number: 20250060247
    Abstract: An abnormal sound detection device for detecting a peripheral interface device includes a vibration simulation mechanism, a movable-type audio collecting device and a controlling and analyzing device. The vibration simulation mechanism includes a mechanism body. The peripheral interface device is accommodated within the mechanism body. The vibration simulation mechanism generates a vibration force. The peripheral interface device generates a vibration sound wave in response to the vibration force. The movable-type audio collecting device collects the vibration sound wave. The audio collecting device generates a vibration audio signal in response to the vibration sound wave. The controlling and analyzing device generates an abnormal sound detection signal to control the vibration simulation mechanism to generate the vibration force. The controlling and analyzing device detects and identifies whether there is an abnormal sound phenomenon in the vibration audio signal.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 20, 2025
    Inventors: Yung-Tai Pan, Ting-Yuan Cheng
  • Publication number: 20250063299
    Abstract: An abnormal sound detection device for detecting a peripheral interface device includes a vibration simulation mechanism, an audio collecting device with plural audio collectors, and a controlling and analyzing device. The peripheral interface device generates a vibration sound wave in response to a vibration force from the vibration simulation mechanism. The plural audio collectors are used to collect the vibration sound wave and generate a vibration audio signal. The plural audio collectors are divided into at least two audio collection units. The controlling and analyzing device generates an abnormal sound detection signal. The vibration audio signal is inputted into the controlling and analyzing device. The controlling and analyzing device detects and identifies whether there is an abnormal sound phenomenon in the vibration audio signal. The abnormal sound detection signal contains at least two abnormal sound detection sub-signals in serial sequence.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 20, 2025
    Inventors: Yung-Tai Pan, Ting-Yuan Cheng
  • Patent number: 12230242
    Abstract: Provided are a sound gathering device for voiceprint monitoring and a preparation method. The sound gathering device is a cone structure and includes a front end portion (1) and a rear end portion (2), the front end portion (1) is trumpet-shaped, an inner wall surface of the front end portion (1) is present a pattern array of a microstructure (3), and the microstructure (3) presenting the pattern array is formed through laser etching. A sound wave frequency monitored by the sound gathering device is 50 Hz˜10 kHz, and a sound wave enters the sound gathering device from an entrance of the front end portion (1), is reflected through the pattern array of the microstructure (3) on the inner wall surface of the front end portion (1), and is transmitted from an exit of the rear end portion (2), and a sound pressure of the exit of the rear end portion (2) is 4 times˜8 times a sound pressure of the entrance of the front end portion (1).
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: February 18, 2025
    Assignee: State Grid Jiangsu Taizhou Power Supply Company
    Inventors: Yong Li, Ting Chen, Ling Ju, Jijing Yin, Ze Zhang, Xingchun Xu, Beibei Weng, Zhenguo Chuai, Yan Wu, Li Chen, Yang Cheng, Tianyu He, Le Yuan, Jie Qian, Debao Tang, Yanquan Zhu, Anqi Ding, Kaiming Bian, Wen Chen, Wanjian Hu, Hongbo Dai, Weijun Shi
  • Publication number: 20250054934
    Abstract: An integrated circuit (IC) package includes a first integrated circuit (IC) device. An interconnection structure is disposed over the first IC device in a cross-sectional side view. The interconnection structure includes a plurality of interconnection components. A cavity is disposed in the interconnection structure in the cross-sectional side view. A second IC device is disposed at least partially within the cavity in the cross-sectional side view. The second IC device is electrically coupled to the first IC device through at least a subset of the interconnection components of the interconnection structure. A non-metallic material partially fills the cavity. The second IC device is at least partially surrounded by the non-metallic material in the cross-sectional side view and in a top view.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 13, 2025
    Inventors: Wei-Yu Chou, Yang-Che Chen, Yi-Lun Yang, Ting-Yuan Huang, Hsiang-Tai Lu
  • Patent number: 12225152
    Abstract: A system for achieving display of CarPlay operation interface on display screens of multiple electronic devices is disclosed. The system comprises a first electronic device and a second electronic device, wherein the first electronic device has functionality of Apple CarPlay because of including an Apple Mfi authentication chip. Particularly, a CarPlay executor comprising a principal execution unit and a plurality of sub-execution units is provided in the first electronic device. As such, after a second mobile electronic device is in communication with a second electronic device that is coupled to the first electronic device, one sub-execution unit is authorized by the Apple Mfi authentication chip so as to let a CarPlay operation interface be shown on a display screen of the second electronic device, thereby achieving display of CarPlay operation interface on display screens of multiple electronic devices.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 11, 2025
    Assignee: PROLIFIC TECHNOLOGY INC.
    Inventors: Ting-Ta Chien, Hsing-Yun Hsieh, Ren-Yuan Yu
  • Publication number: 20250046702
    Abstract: A semiconductor structure includes an interconnect structure, a passivation structure, a first capacitor, and a contact feature. The interconnect structure is disposed over a semiconductor substrate. The passivation structure is disposed over the interconnect structure. The first capacitor is disposed within the passivation structure. The contact feature is disposed over the passivation structure, wherein the first capacitor is proximal to a corner of the contact feature. A method of manufacturing the semiconductor structure is also provided.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 6, 2025
    Inventors: WEI-YU CHOU, YANG-CHE CHEN, TING-YUAN HUANG, TSE-WEI LIAO, CHENG-YU HSIEH, HSIANG-TAI LU
  • Publication number: 20250040418
    Abstract: A display panel and a display device are disclosed. The display panel includes a substrate, a light-emitting element layer, a pixel defining layer, an encapsulation layer, a color filter layer, and an anti-reflection layer. The light-emitting element layer includes multiple light-emitting elements arranged in an array on the substrate. The pixel defining layer is disposed on the substrate, and every two adjacent light-emitting elements are separated by the pixel defining layer. The encapsulation layer is disposed on the light-emitting elements and the pixel defining layer. The color filter layer includes multiple color filters disposed on the encapsulation layer. The anti-reflection layer is disposed on the encapsulation layer to block external light from entering the display panel, and includes an alignment film and polarizing molecules evenly distributed within the alignment film.
    Type: Application
    Filed: June 19, 2024
    Publication date: January 30, 2025
    Inventors: JING LI, Hailiang Wang, Ting Zhou, Laidi Wu, Min Huang, Tianjun Huang, Haijiang Yuan
  • Patent number: 12211793
    Abstract: The present disclosure, in some embodiments, relates to an integrated circuit. The integrated circuit includes first and second source/drain regions on or within a substrate. A first gate is arranged over the substrate between the first source/drain region and the second source/drain region. A first middle-end-of-the-line (MEOL) structure is arranged over the second source/drain region and a second MEOL structure is arranged over a third source/drain region. A conductive structure contacts the first MEOL structure and the second MEOL structure. A second gate is separated from the first gate by the second source/drain region. The conductive structure vertically and physically contacts a top surface of the second gate that is coupled to outermost sidewalls of the second gate. A plurality of conductive contacts are configured to electrically couple an interconnect wire and the first MEOL structure along one or more conductive paths extending through the conductive structure.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ni-Wan Fan, Ting-Wei Chiang, Cheng-I Huang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan, Chi-Yu Lu
  • Publication number: 20250019795
    Abstract: A method for extracting germanium based on acid decomposition is provided, including acid decomposition and post-treatment steps, and specifically including: adding an acid to a coal ash for conditioning to obtain a material a; heating the material a to 350° C. to 800° C., and keeping the material a at this temperature for 10 min to 10 h to obtain an acid-decomposed material b; milling the acid-decomposed material b until more than 60% of a milled material has a particle size of less than 200 mesh to obtain a material c; subjecting the material c to distillation to obtain a residual slurry d and a distillation fraction e; and hydrolyzing the distillation fraction e with a dilute hydrochloric acid solution, and then oven-drying to obtain GeO2.
    Type: Application
    Filed: September 27, 2024
    Publication date: January 16, 2025
    Applicant: KUNMING METALLURGICAL RESEARCH INSTITUTE CO., LTD.
    Inventors: Xiaocai HE, Huixian SHI, Jiuyang REN, Na XU, Ye YUAN, Qingxin XU, Yina LI, Qiugu HE, Ting REN, Yuan XU, Weizhi DIAO, Sen YAN, Hui ZHANG
  • Publication number: 20250012655
    Abstract: A gas leak detection device and a detecting method are provided. The gas leak detection device includes a remote temperature sensor and a processor. The remote temperature sensors detect an area-to-be-monitored to obtain a plurality of thermal images. Each pixel position in the thermal images includes a corresponding temperature value. The processor obtains the thermal images from the remote temperature sensor, calculates a detected temperature value of each environmental block according to each of a plurality of environmental blocks in the thermal images, calculates a temperature judgment threshold based on the detected temperature value of each environmental block in a detection time period, determines whether a temperature of at least one region-of-interest is abnormal based on the temperature judgment threshold, and performs a warning operation when the temperature of the at least one region-of-interest is abnormal.
    Type: Application
    Filed: March 6, 2024
    Publication date: January 9, 2025
    Applicant: VIA Technologies, Inc.
    Inventors: Yeh Cho, Ting-Yuan Chang, Fan-Hao-Chi Fang
  • Patent number: 12180067
    Abstract: A device includes a microelectromechanical system (MEMS) sensor die comprising a deformable membrane, a MEMS heating element, and a substrate. The MEMS heating element is integrated within a same layer and a same plane as the deformable membrane. The MEMS heating element surrounds the deformable membrane and is separated from the deformable membrane through a trench. The MEMS heating element is configured to generate heat to heat up the deformable membrane. The substrate is coupled to the deformable membrane.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: December 31, 2024
    Assignee: InvenSense, Inc.
    Inventors: Pei-Wen Yen, Ting-Yuan Liu, Jye Ren, Chung-Hsien Lin, Joseph Seeger, Calin Miclaus
  • Publication number: 20240419294
    Abstract: The present disclosure generally relates to methods and user interfaces for positioning a virtual keyboard in a three-dimensional environment, displaying various types of virtual keyboards, for switching between virtual keyboards, and/or displaying a virtual keyboard based on a position of a user.
    Type: Application
    Filed: May 29, 2024
    Publication date: December 19, 2024
    Inventors: Evgenii KRIVORUCHKO, Torsten BECKER, Shuxin YU, Stephen O. LEMAY, Zoey C. TAYLOR, Laura C. MADEYA, Emily K. VAN HAREN, Ting-Yuan WU
  • Patent number: 12140489
    Abstract: A pressure sensor comprises a polysilicon sensing membrane. The pressure sensor further includes one or more polysilicon electrodes disposed over a silicon substrate. The sensor also includes one or more polysilicon routing layers that electrically connects electrodes of the one or more polysilicon electrodes to one another, wherein the polysilicon sensing membrane deforms responsive to a stimuli and changes a capacitance between the polysilicon sensing membrane and the one or more polysilicon electrodes. The sensor also includes one or more vacuum cavities positioned between the polysilicon sensing membrane and the one or more polysilicon electrodes.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: November 12, 2024
    Assignee: InvenSense, Inc.
    Inventors: Tsung Lin Tang, Chung-Hsien Lin, Ting-Yuan Liu, Weng Shen Su, Yaoching Wang
  • Patent number: 12139398
    Abstract: A method includes depositing a passivation layer on a substrate; depositing and patterning a first polysilicon layer on the passivation layer; depositing and patterning a first oxide layer on the first polysilicon layer forming a patterned first oxide layer; depositing and patterning a second polysilicon layer on the patterned first oxide layer. A portion of the second polysilicon layer directly contacts a portion of the first polysilicon layer. A portion of the patterned second polysilicon layer corresponds to a bottom electrode. A second oxide layer is deposited on the patterned second polysilicon layer and on an exposed portion of the patterned first oxide layer. A portion of the second oxide layer corresponding to a sensing cavity is etched, exposing the bottom electrode. Another substrate is bonded to the second oxide layer enclosing the sensing cavity. A top electrode is disposed within the another substrate and positioned over the bottom electrode.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: November 12, 2024
    Assignee: InvenSense, Inc.
    Inventors: Weng Shen Su, CHung-Hsien Lin, Yaoching Wang, Tsung Lin Tang, Ting-Yuan Liu, Calin Miclaus
  • Publication number: 20240363576
    Abstract: A semiconductor package structure includes a semiconductor die encapsulated in a molding compound, a redistribution structure over the semiconductor die and the molding compound, a surface device over and electrically connected to the redistribution structure, a first connector over and electrically connected to the redistribution structure, a second connector between the surface device and the redistribution structure, a trench in the redistribution structure and laterally surrounding the surface device in a top view of the semiconductor package structure, and an underfill. The second connector electrically connects the surface device to the redistribution structure. The underfill surrounds the second connector. The underfill include a first portion and a second portion. The first portion of the underfill is located between the surface device and the redistribution structure and laterally surrounding the second connector, and the second portion of the underfill is disposed in the trench.
    Type: Application
    Filed: April 25, 2023
    Publication date: October 31, 2024
    Inventors: WEI-YU CHOU, YANG-CHE CHEN, YI-LUN YANG, TING-YUAN HUANG, HSIANG-TAI LU
  • Publication number: 20240355058
    Abstract: In some implementations, a computing device can present augmented reality (AR) labels in an AR video stream. For example, the computing device can obtain route information for a route requested by a user and can determine locations along the route for placing candidate AR labels. The computing device can determine the precise location of the computing device using camera depth information obtained in response to the user scanning the local real-world environment with a camera of the computing device. The computing device can select an AR label and/or label placement location for presentation in an AR video stream based on various criteria, including the distance between the candidate AR labels and the precise location of the computing device, priorities assigned to each candidate AR label, and/or whether a clear line of sight exists between the precise location of the computing device and the candidate AR label location.
    Type: Application
    Filed: June 6, 2024
    Publication date: October 24, 2024
    Applicant: Apple Inc.
    Inventors: Ting-Yuan Wu, Lukasz J. Pasek, Ishan Bhutani, Syed Mohsin Hasan, Isil Uzum Vella, Eugene P. Sturm, Razvan Bangu, Paul F. Ahrens, Matthew B. Ball, Patrick J. Coleman, Benjamin R. Dreyer, Roy E. West, Brian J. Andrich, George Magharious