Patents by Inventor Ting-Yun Lin

Ting-Yun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166088
    Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ting Fang, Chung-Hao Cai, Jui-Ping Lin, Chia-Hsien Yao, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20240387352
    Abstract: A capacitive coupling package structure includes a plurality of first leads, a plurality of second leads, two first coupling plates, two second coupling plates, a first chip, a second chip, a first package member, and a second package member. The two first coupling plates and the two second coupling plates are vertically separate from each other and are partially and vertically overlapped with each other, respectively.
    Type: Application
    Filed: April 29, 2024
    Publication date: November 21, 2024
    Inventors: YOU-FA WANG, TING-WEI KAO, CHIA-YUN LEE, YUAN-LUNG WU, PU-HAN LIN
  • Publication number: 20240282671
    Abstract: A method includes forming a multi-layer stack comprising dummy layers and semiconductor layers located alternatingly, and forming a plurality of dummy gate stacks on sidewalls and a top surface of the multi-layer stack. Two of the plurality of dummy gate stacks are immediately neighboring each other, and have a space in between. A first source/drain region and a second source/drain region are formed in the multi-layer stack, with the second source/drain region overlapping the first source/drain region. The method further includes replacing the plurality of dummy gate stacks with a plurality of replacement gate stacks, replacing a first one of the plurality of replacement gate stacks with a first dielectric isolation region, forming a deep contact plug in the space, forming a front-side via over the deep contact plug, and forming a back-side via under the deep contact plug, wherein the front-side via is electrically connected to the back-side via through the deep contact plug.
    Type: Application
    Filed: June 2, 2023
    Publication date: August 22, 2024
    Inventors: Kuan Yu Chen, Chun-Yen Lin, Hsin Yang Hung, Ching-Yu Huang, Wei-Cheng Lin, Jiann-Tyng Tzeng, Ting-Yun Wu, Wei-De Ho, Szuya Liao
  • Publication number: 20240266965
    Abstract: A hybrid power conversion circuit includes a high-side switch, a low-side switch, a transformer, a resonance tank, a first switch, a second switch, a first synchronous rectification switch, a second synchronous rectification switch, and a third switch. The resonance tank has an external inductor, an external capacitance, and an internal inductor. The first switch is connected to the external inductor. The second switch and a first capacitance form a series-connected path, and is connected to the external capacitance. The first and second synchronous rectification switches are respectively coupled to a first winding and a second winding. The third switch is connected to the second synchronous rectification switch. When an output voltage is less than a voltage interval, the hybrid power conversion circuit operates in a hybrid flyback conversion mode, and otherwise the hybrid power conversion circuit operates in a resonance conversion mode.
    Type: Application
    Filed: March 11, 2024
    Publication date: August 8, 2024
    Inventors: Sheng-Yu WEN, Cheng-Yi LIN, Ting-Yun LU
  • Patent number: 11239607
    Abstract: A fastening device for expansion cards that is capable of connecting to a slot on a normal motherboard and fastening an expansion card in the slot is disclosed. The fastening device includes a top pressing unit and two side fastening units, wherein the two side fastening units are connected to two ends of the top pressing unit, respectively, and each side fastening unit is provided with an opening. When two clip units disposed on the two ends of the slot pass through the openings of the two side fixing units respectively, the top pressing unit presses the top edge of the expansion card inserted into the slot and the two side fastening units respectively press and fasten the two clip units so as to restrain the clip units from unlocking and to prevent the expansion card from becoming loose in the slot.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: February 1, 2022
    Assignee: Innodisk Corporation
    Inventors: Shuang-Te Chang, Ting-Yun Lin, Cheng-Wei Lee, Rei Yeh, Chung-Yu Chuang
  • Publication number: 20210135401
    Abstract: A fastening device for expansion cards that is capable of connecting to a slot on a normal motherboard and fastening an expansion card in the slot is disclosed. The fastening device includes a top pressing unit and two side fastening units, wherein the two side fastening units are connected to two ends of the top pressing unit, respectively, and each side fastening unit is provided with an opening. When two clip units disposed on the two ends of the slot pass through the openings of the two side fixing units respectively, the top pressing unit presses the top edge of the expansion card inserted into the slot and the two side fastening units respectively press and fasten the two clip units so as to restrain the clip units from unlocking and to prevent the expansion card from becoming loose in the slot.
    Type: Application
    Filed: April 17, 2020
    Publication date: May 6, 2021
    Inventors: SHUANG-TE CHANG, TING-YUN LIN, CHENG-WEI LEE, REI YEH, CHUNG-YU CHUANG
  • Patent number: 10465056
    Abstract: The method for producing a transparent conductive substrate includes forming metal meshes on a flexible non-conductive substrate with high transmittance. It's unnecessary to use palladium as a catalyst in this method. The metal meshes are in the form of nano/micro wires and the conductive substrate has high transmittance of 80%-90% at visible light wavelengths of 390-750 nm.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: November 5, 2019
    Assignee: NATIONAL CHUNG HSING UNIVERSITY
    Inventors: Wei-Ping Dow, Po-Ting Chen, Liang-Jie Lin, Hung-Ming Chang, Ting-Yun Lin, Fang-Yu Lin
  • Publication number: 20180340050
    Abstract: The method for producing a transparent conductive substrate includes forming metal meshes on a flexible non-conductive substrate with high transmittance. It's unnecessary to use palladium as a catalyst in this method. The metal meshes are in the form of nano/micro wires and the conductive substrate has high transmittance of 80%-90% at visible light wavelengths of 390-750 nm.
    Type: Application
    Filed: November 6, 2017
    Publication date: November 29, 2018
    Inventors: Wei-Ping Dow, Po-Ting Chen, Liang-Jie Lin, Hung-Ming Chang, Ting-Yun Lin, Fang-Yu Lin