Abstract: An array substrate includes a base substrate; a pixel definition layer on the base substrate, the pixel definition layer defining subpixel apertures; and a spacer layer on a side of the pixel definition layer away from the base substrate, wherein the spacer layer includes first spacers arranged in a first array and second spacers arranged in a second array. Centers of subpixel apertures of two subpixels directly adjacent to an individual first spacer of the first spacers are arranged along a first spacer direction. Centers of subpixel apertures of two subpixels directly adjacent to an individual second spacer of the second spacers are arranged along a second spacer direction. The first spacer direction is different from the second spacer direction. A plurality of subpixels are arranged in an array of a plurality of rows along a first direction and a plurality of columns along a second direction.

Abstract: Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.

Abstract: Provided are a pixel circuit, a driving method and a display apparatus, including: a light emitting device; a driving transistor, configured to produce a current for driving the light emitting device to emit light according to a data voltage; a voltage control circuit, coupled to the driving transistor, wherein the voltage control circuit is configured to reset the driving transistor (M0) and input the data voltage in response to a loaded signal; and a light emitting control circuit, coupled to the driving transistor and the light emitting device, wherein the light emitting control circuit is configured to provide the current produced by the driving transistor to the light emitting device; wherein a frequency of resetting the driving transistor is not less than a frequency of inputting the data voltage.

Abstract: An array substrate is provided. The array substrate includes K number of reset signal lines respectively configured to provide reset signals to reset transistors in K columns pixel driving circuits of the array substrate. The K number of reset signal lines includes a plurality of third reset signal lines in (2k?1)-th columns of K columns, K and k being positive integers, 1?k?(K/2); and a plurality of fourth reset signal lines in (2k)-th columns of the K columns.

Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a plurality of circuit units, a plurality of data signal lines extending along a second direction, a plurality of first connection lines, and a plurality of second connection lines; a circuit unit includes a pixel drive circuit, at least one data signal line is connected with a plurality of pixel drive circuits of a unit column, first ends of the plurality of first connection lines are correspondingly connected with the plurality of data signal lines, and second ends of the plurality of first connection lines are correspondingly connected with the plurality of second connection lines; pixel drive circuits in adjacent unit columns are mirror symmetrical with respect to a center line, and a second connection line is disposed at a gap between pixel drive circuits in adjacent unit columns.

Abstract: A display substrate and a display device. In the display substrate, a plurality of first output ends of the plurality of straight edge gate driving structures are connected to the plurality of first signal lines through a plurality of first connection structures, and a plurality of second output ends of the plurality of rounded corner gate driving structures are connected to the plurality of second signal lines through a plurality of second connection structures; the first conductive part and the second conductive part are located in a same conductive layer, and a number and a type of the plurality of via connection structures in each of the plurality of first connection structures are the same as a number and a type of the plurality of via connection structures in each of the plurality of second connection structures.

Abstract: A display panel includes a display area including at least one through hole and an annular non-display area between the through hole and the display area enclosing the through hole. The annular non-display area includes: at least two annular blocking dams, a through-hole crack detecting line, and a connecting portion. The annular blocking dams enclose the through hole and are mutually nested. Adjacent annular blocking dams are spaced at a predetermined distance. The through-hole crack detecting line comprises an input wiring portion, an output wiring portion and a winding portion. The input wiring portion and the output wiring portion are connected through the winding portion. The input wiring portion and the output wiring portion extend to the display area. The winding portion is around the edge of the through hole. The connecting portion is between the annular blocking dams and connecting some areas of the annular blocking dams.

Abstract: Provided are a display substrate and a display device. In the display substrate, the first separation structure includes a first separation part and a second separation part which are stacked, the second separation structure includes a third separation part and a fourth separation part which are stacked, the second separation part has a first protruding part, the first protruding part protrudes relative to the first separation part, and at least one sub-functional layer of the light-emitting functional layer is disconnected at the first protruding part; the fourth separation part has a second protruding part, the second protruding part protrudes relative to the third separation part, and at least one sub-functional layer of the light-emitting functional layer is disconnected at the second protruding part; the first separation structure surrounds the light-emitting region; and the second separation structure is ring-shaped so as to surround the hole region.

Abstract: An array substrate is provided. The array substrate includes a gate line; a data line; a voltage supply line; and a pixel driving circuit. The pixel driving circuit includes a plurality of transistors and a storage capacitor. The storage capacitor includes a first capacitor electrode, a second capacitor electrode, and an insulating layer between the first capacitor electrode and the second capacitor electrode. The second capacitor electrode is electrically connected to the voltage supply line. The second capacitor electrode includes a first portion and a second portion as parts of a first unitary structure in a respective subpixel. The voltage supply line crosses over the first portion by a first crossing-over distance. The data line crosses over the second portion by a second crossing-over distance. The first crossing-over distance is greater than the second crossing-over distance.

Abstract: A display substrate and a display device are provided. The display substrate includes repeating units, each repeating unit includes one first color sub-pixel, one second color sub-pixel pair and one third color sub-pixel, the second color sub-pixel pair includes two second color sub-pixels. In each repeating unit, a distance, along the first direction, between a center of the third color sub-pixel and a center of the second color sub-pixel pair is a first distance; two adjacent repeating units located in a same repeating unit group include a first repeating unit and a second repeating unit, a distance between a center of a second color sub-pixel pair in a third repeating unit adjacent to both the first repeating unit and the second repeating unit and a center of a third color sub-pixel in the first repeating unit is a second distance, and the first distance is different from the second distance.

Abstract: A display substrate and a display device are provided. The display substrate includes repeating units, each repeating unit includes one first color sub-pixel, one second color sub-pixel pair and one third color sub-pixel arranged along a first direction, the second color sub-pixel pair includes two second color sub-pixels arranged along a second direction. In each repeating unit, a distance, along the first direction, between a center of the third color sub-pixel and a center of the second color sub-pixel pair is a first distance; two adjacent repeating units arranged along the first direction include a first repeating unit and a second repeating unit, and half of a distance, along the first direction, between the center of the third color sub-pixel in the first repeating unit and a center of the first color sub-pixel in the second repeating unit is less than the first distance.

Abstract: A display panel and a display apparatus are provided; the display panel is divided into a display region and a non-display region at least partially surrounding the display region; a fan-out region is provided in the non-display region; the display panel includes a substrate and a first power trace provided on the substrate; a first portion of the first power trace is provided in the fan-out region and configured to transmit a first power signal; and the first portion includes: a sheet-shaped trace proximal to an edge of the display panel, and a plurality of stripe-shaped traces spaced apart from one another and extending from the sheet-shaped trace toward the display region. According to the present disclosure, the first power trace in the fan-out region is configured to include the plurality of strip-shaped traces.

Abstract: Embodiments of this disclosure provide a display substrate and a display device. The display substrate includes: sub-pixels located on a base substrate; a first conductive layer located on one side of the base substrate, and including signal lines sequentially disposed in a first direction and extending towards a second direction, and signal line bulges and anode adaptor parts located on the same side of the signal line and disposed alternately; and anodes located between the first conductive layer and a pixel defining layer. Each anode includes an effective part exposed by a corresponding sub-pixel opening, the effective parts of at least part of the sub-pixels have overlapping regions with the signal line bulges and the anode adaptor parts in the second direction, and the second direction is perpendicular to the first direction.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, a pixel circuit layer and an anode layer; the pixel circuit layer includes a plurality of pixel driving circuits, the anode layer includes a plurality of anode groups, each of the plurality of anode groups includes a first anode and a second anode which are oppositely arranged, the first anode includes a first main body portion and a first connection portion, the first anode further includes an extension portion and an anode compensation portion, an orthographic projection of the anode compensation portion on the base substrate covers one thin film transistor in the pixel driving circuit connected to the first connection portion.

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. In the display substrate, the sub-pixel driving circuit includes a driving transistor and a first reset transistor, and a gate electrode of the first reset transistor is electrically connected to the reset signal line pattern, a first electrode of the first reset transistor is electrically connected to the initialization signal line pattern, and a second electrode of the first reset transistor is electrically connected to a gate electrode of the driving transistor; and the shielding pattern is electrically connected to the power signal line pattern, an orthographic projection of the shielding pattern on the substrate overlaps an orthographic projection of the first electrode of the first reset transistor on the substrate.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, first color sub-pixels, data lines, and first power signal lines located on the base substrate. Each first color sub-pixel includes an organic light emitting element including a first electrode, a light emitting layer and a second electrode. The data lines are located between the second electrode and the base substrate. The first power signal lines are disposed in the same layer as the data lines. The display substrate further includes a first pad block disposed in the same layer as the data lines; the second electrode of each first color sub-pixel is overlapped with the data line, the first power signal line and the first pad block; and the first power signal line and the first pad block are located at both sides of the data line.

Abstract: A display panel and a display apparatus are provided. The display panel includes: first color sub-pixels in a first color sub-pixel column, second color sub-pixels in a second color sub-pixel column, and third color sub-pixels in a third color sub-pixel column; multiple data signal lines including a first data signal line connected to the first color sub-pixel column, a second data signal line connected to the second color sub-pixel column, and a third data signal line connected to the third color sub-pixel column; multiple compensation units including a first compensation capacitor connected to the first data signal line, a second compensation capacitor connected to the second data signal line, and a third compensation capacitor connected to the third data signal line, a capacitance value of the third compensation capacitor is greater than a capacitance value of the first compensation capacitor, which that of the second compensation capacitor.

Abstract: A display substrate, a working method thereof, and a display device. The display substrate includes K pixel rows and K is a positive integer greater than 1; at least one pixel row includes an initial signal line, a scan signal line, and a plurality of sub-pixels disposed sequentially along an extension direction of the initial signal line and the scan signal line; the initial signal line includes a third initial signal line, the scan signal line includes a second scan signal line, at least one sub-pixel includes a pixel drive circuit, the pixel drive circuit at least includes a third transistor as a drive transistor and an eighth transistor as an initialization transistor; in at least a pixel row, the eighth transistor is connected with the third initial signal line, the second scan signal line, and a second electrode of the drive transistor.

Abstract: The display substrate includes a substrate, multiple sub-pixels, multiple data lines, multiple power lines, multiple data signal input lines, multiple selector switches, a first power bus located in a peripheral area and on a side, facing away from the display area, of the multiple selector switches, and multiple power connection cables located in the peripheral area and between the first power bus and the multiple power lines. The multiple power connection cables are electrically connected with the first power bus and the multiple power lines.

Abstract: A driving backplane, a display panel and a display device are provided. The driving backplane has a pixel circuit, a data line and a power line; transistors include a driving transistor, a writing transistor, a compensation transistor and an initialization transistor; the power line includes a power line body extending along a column direction and a shielding part connected to a side of the power line body along a row direction; at least a portion of the writing transistor and the initialization transistor are located between the power line and the data line; a channel of the driving transistor overlaps with the power line; and a channel of the compensation transistor overlaps with the shielding part.