Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.

Abstract: A magnetic seat adjustment system includes a frame structure, a movable adjustment mechanism, and a control system. The frame structure includes a first magnetic portion fixedly coupled to the frame structure and including first magnetic members that independently generate a magnetic field. The movable adjustment mechanism includes a movable base and a second magnetic portion. The second magnetic portion is fixedly coupled to the movable base and includes second magnetic members that independently generate a magnetic field. The control system controls a change in the magnetic field of the second magnetic members and/or the first magnetic members. When the magnetic field of the second magnetic members interacts with the magnetic field of the first magnetic members, the seat is in a magnetic levitation state, so that movement of the movable base drives movement of the seat.

Abstract: A method includes designing a plurality of cells for a semiconductor device, wherein designing the plurality of cells comprises reserving a routing track of a plurality of routing tracks within each of the plurality of cells, wherein each of the plurality of cells comprises signal lines, and the reserved routing track is free of the signal lines. The method includes placing a first cell and a second cell of the plurality of cells in a layout of the semiconductor device. The method includes determining whether any power rails overlap with any of the plurality of routing tracks other than the reserved routing track in the second cell. The method includes adjusting a distance between the first cell and the second cell in response to a determination that at least one power rail overlaps with at least one routing track other than the reserved routing track.

Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.

Abstract: Systems and methods for generating, distributing, and using performance mode BIOS configurations are disclosed. Each performance mode BIOS configuration can be a unique set of BIOS setting values that have been established to optimize a particular performance parameter or set of performance parameters, such as boot speed or operating system installation speed. Based on a given hardware configuration and/or set of performance parameters, one or more performance mode BIOS configurations can be packaged and transferred to a memory of a BMC in the form of one or more configuration payloads. The BIOS Setup Utility can display all configuration payloads, such as listed by the type of performance mode (e.g., “Boot Speed Performance Mode” and “OS Installation Performance Mode”), that are available in the BMC memory and allow a user to overwrite the memory containing the current BIOS configuration with a selected configuration payload.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.

Abstract: The present disclosure relates to a semiconductor device with a hybrid fin-dielectric region. The semiconductor device includes a substrate, a source region and a drain region laterally separated by a hybrid fin-dielectric (HFD) region. A gate electrode is disposed above the HFD region and the HFD region includes a plurality of fins covered by a dielectric and separated from the source region and the drain region by the dielectric.

Abstract: A probe pin cleaning pad including a foam layer, a cleaning layer, and a polishing layer is provided. The cleaning layer is disposed between the foam layer and the polishing layer. A cleaning method for a probe pin is also provided.

Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.

Abstract: An article includes a foamed member including a polymeric material, and a core embedded in the foamed member, the core includes a first surface, a second surface and a sidewall, the foamed member covers at least a portion of the first surface, and covers the entire sidewall and the entire second surface. A method of manufacturing an article includes providing a molding device including a first mold and a second mold, the first mold includes a supporting member protruded from an inner wall. The method further includes disposing a core on the supporting member; disposing the second mold over the first mold to form a mold cavity, the core is disposed within the mold cavity; injecting a first material into the mold cavity; and foaming the first material to form a first foamed member, wherein at least a portion of the first foamed member is in contact with the core.

Abstract: A magnetic seat adjustment system includes a frame structure, a movable adjustment mechanism, and a control system. The frame structure includes a first magnetic portion fixedly coupled to the frame structure and including first magnetic members that independently generate a magnetic field. The movable adjustment mechanism includes a movable base and a second magnetic portion. The second magnetic portion is fixedly coupled to the movable base and includes second magnetic members that independently generate a magnetic field. The control system controls a change in the magnetic field of the second magnetic members and/or the first magnetic members. When the magnetic field of the second magnetic members interacts with the magnetic field of the first magnetic members, the seat is in a magnetic levitation state, so that movement of the movable base drives movement of the seat.

Abstract: An image inspection method includes capturing a target object image, which the target object image comprises a plurality of graphical features; choosing a block image comprising a specific graphical feature of the plurality of graphical features from the target object image; capturing all the graphical features of the block image to obtain a region of interest (ROI); executing a filtering process or a recovering process on the ROI to obtain a pre-processed region; and inspecting, according to the pre-processed region, the target object image to determine whether the target object image has defects.

Abstract: An image inspection method includes capturing a target object image, which the target object image comprises a plurality of graphical features; choosing a block image comprising a specific graphical feature of the plurality of graphical features from the target object image; capturing all the graphical features of the block image to obtain a region of interest (ROI); executing a filtering process or a recovering process on the ROI to obtain a pre-processed region; and inspecting, according to the pre-processed region, the target object image to determine whether the target object image has defects.

Abstract: A time-sharing buffer access system manages a buffer among plural master devices. Plural buffer handling units are operable to associatively couple the master devices, respectively, and a first end of each buffer handling unit is used to independently transfer data to or from the associated master device. A second end of each buffer handling unit is coupled to a buffer switch. A time slot controller defines a time slot, during which one of the buffer handling units is selected by the buffer switch such that data are only transferred between the selected buffer handling unit and the buffer.

Abstract: A time-sharing buffer access system manages a buffer among plural master devices. Plural buffer handling units are operable to associatively couple the master devices, respectively, and a first end of each buffer handling unit is used to independently transfer data to or from the associated master device. A second end of each buffer handling unit is coupled to a buffer switch. A time slot controller defines a time slot, during which one of the buffer handling units is selected by the buffer switch such that data are only transferred between the selected buffer handling unit and the buffer.

Abstract: The present invention discloses a method of applying micro-protection in defect analysis. The method includes providing a substrate having at least one defect thereon, forming the micro-protection on the surface of the defect, confirming the site of the defect, and forming a specimen of the defect by utilizing a focused ion beam microscope.

Abstract: The present invention discloses a method of applying micro-protection in defect analysis. The method includes providing a substrate having at least one defect thereon, forming the micro-protection on the surface of the defect, confirming the site of the defect, and forming a specimen of the defect by utilizing a focused ion beam microscope.

Abstract: An analysis method is disclosed. At least one layer is disposed on a substrate, covering a pre-analysis pattern and a reference pattern. A portion of the layer is removed to expose the reference pattern, and locate the unexposed pre-analysis pattern, using the reference pattern as a reference. Thus, the pre-analysis pattern is capable to be analyzed precisely without damage.