Abstract: A direct-attached storage device bridge includes boot loader logic, a read-only memory, and logic to generate hash codes to be compared to determine whether to proceed with booting of the device. The hash codes may result from applying a public key from the read-only memory to decrypt an encrypted hash code into a decrypted hash code, to decrypt encrypted firmware instructions and to calculate a first calculated hash code of the decrypted firmware instructions, and to calculate a second calculated hash code for firmware instructions stored as clear-text. Multiple public keys may be utilized and selected during the boot process. The encryption and decryption may utilize asymmetric and symmetric keys.

Abstract: This disclosure relates to a storage device comprising non-volatile storage and a controller. The non-volatile storage may comprise a firmware image, a known data pattern (KDP) in plaintext, and an encrypted KDP. The controller may be coupled to the non-volatile storage, and may be configured to update the firmware image of the non-volatile storage. For this update, the controller may first receive a symmetric key from a host by way of a public key encryption process. Next, the controller may decrypt the encrypted KDP using the symmetric key. If the decrypted KDP matches the KDP in plaintext, the symmetric key may be validated and the firmware image update may be downloaded. The firmware image update may then replace the firmware image in non-volatile storage.

Abstract: A direct-attached storage device bridge includes boot loader logic, a read-only memory, and logic to generate hash codes to be compared to determine whether to proceed with booting of the device. The hash codes may result from applying a public key from the read-only memory to decrypt an encrypted hash code into a decrypted hash code, to decrypt encrypted firmware instructions and to calculate a first calculated hash code of the decrypted firmware instructions, and to calculate a second calculated hash code for firmware instructions stored as clear-text. Multiple public keys may be utilized and selected during the boot process. The encryption and decryption may utilize asymmetric and symmetric keys.

Abstract: Systems and methods are disclosed for sub-dividing data in non-volatile data storage modules. A data storage device includes a non-volatile memory comprising a plurality of physical addresses (PBAs) storing data for a first logical unit number (LUN) and a second LUN, as well as controller circuitry configured to receive a storage access request from a host system, the storage access request including a logical address (LBA), an address range, and LUN identification information. The controller circuitry is further configured to map the LBA to a translated LBA that is one of N contiguous comprehensive LBAs based on the LBA and the LUN identification information, the comprehensive LBAs being associated with both the first LUN and the second LUN, map the translated LBA to one of the plurality of PBAs of the non-volatile memory, and read from or write to at least the one of the plurality of PBAs.

Abstract: Systems and methods are disclosed for programming non-volatile storage. Methods involve identifying boot loader code stored in a first partition of a non-volatile storage, the boot loader code being marked as active, executing the boot loader code using one or more processors of the computing system, loading a firmware image to a second partition of the non-volatile storage, the second partition being separate from the first partition, and marking the firmware image as active. Methods further involve detecting a power loss event and, following a power cycle, determining that the firmware image is stored in the second partition and has been marked as active, and, in response to said determination, making a copy of the firmware image and storing the copy in the first partition.

Abstract: The system describes one aspect of an apparatus configured to implement a security state for preventing access to a storage device, including a communications hub including an upstream port and a plurality of downstream ports. A first downstream port of the plurality of downstream ports is connected to the storage device, and one or more other downstream ports of the plurality of downstream ports are configured to connect to one or more external devices. The apparatus includes one or more processors configured to monitor the upstream port, determine a connection state of the upstream port, and implement the security state for preventing access to the storage device based on the determined connection state.

Abstract: Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a computing device, a non-volatile flash memory stores program code comprising initialization code designed to be executed a single time during device booting, main program code separate from the initialization code, and main code loader code designed to direct a controller of the computing device to load the main program code from the flash memory to the RAM when executed by the controller. The controller loads the initialization code and the main code loader code to first and second adjacent portions of the RAM, respectively, and loads the main program code, separately from the initialization code, to a third portion of the RAM at least partially overlapping the first portion but not overlapping the second portion, thereby at least partially overwriting the initialization code.

Abstract: Systems and methods are disclosed for sub-dividing data in non-volatile data storage modules. A data storage device includes a non-volatile memory comprising a plurality of physical addresses (PBAs) storing data for a first logical unit number (LUN) and a second LUN, as well as controller circuitry configured to receive a storage access request from a host system, the storage access request including a logical address (LBA), an address range, and LUN identification information. The controller circuitry is further configured to map the LBA to a translated LBA that is one of N contiguous comprehensive LBAs based on the LBA and the LUN identification information, the comprehensive LBAs being associated with both the first LUN and the second LUN, map the translated LBA to one of the plurality of PBAs of the non-volatile memory, and read from or write to at least the one of the plurality of PBAs.

Abstract: A power converter has a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the power converter, and an auxiliary winding is configured to detect an open connection fault of the auxiliary winding. The power converter includes a current source coupled to the auxiliary winding that, when activated, supplies a current to the auxiliary winding. A controller measures a voltage across the auxiliary winding. Responsive to detecting an increase in the voltage across the auxiliary winding while the current source is activated, the controller disables the power converter.

Abstract: Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a computing device, a non-volatile flash memory stores program code comprising initialization code designed to be executed a single time during device booting, main program code separate from the initialization code, and main code loader code designed to direct a controller of the computing device to load the main program code from the flash memory to the RAM when executed by the controller. The controller loads the initialization code and the main code loader code to first and second adjacent portions of the RAM, respectively, and loads the main program code, separately from the initialization code, to a third portion of the RAM at least partially overlapping the first portion but not overlapping the second portion, thereby at least partially overwriting the initialization code.

Abstract: Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a data storage device, a non-volatile memory array stores program code comprising initialization code designed to be executed a single time during device booting, and main program code separate from the initialization code and designed to be executed after execution of the initialization code. A controller loads the initialization code to a first portion of a volatile memory array and executes the initialization code. The controller further loads the main program code, separately from the initialization code, to a second portion of the volatile memory array at least partially overlapping the first portion, and executes the main program code.

Abstract: A power converter has a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the power converter, and an auxiliary winding is configured to detect an open connection fault of the auxiliary winding. The power converter includes a current source coupled to the auxiliary winding that, when activated, supplies a current to the auxiliary winding. A controller measures a voltage across the auxiliary winding. Responsive to detecting an increase in the voltage across the auxiliary winding while the current source is activated, the controller disables the power converter.