Abstract: A container kernel upgrade based on a programmable container kernel, includes, in response to receiving a container kernel upgrade request, freezing an application container in which a to-be-upgraded first container kernel is located. Current container status data of an application container including first container kernel status data and application status data is stored. The application container is restarted by using a second container kernel used for upgrading a container kernel, where restarted container status data of the restarted application container includes second container kernel status data corresponding to the second container kernel when the application container is restarted. Using the stored current container status data, a corresponding data field is updated in a data structure of the restarted container status data.

Abstract: Implementations of the present specification provide an inter-thread interrupt signal sending method and apparatus. In the inter-thread interrupt signal sending method, a processor in which a first thread is located sends a notification message to a PCI device via a PCI bus by using an MMIO write operation. The MMIO write operation is implemented based on a virtual space address of the first thread to which a memory address of an MMIO memory of the PCI device is mapped. The PCI device generates an interrupt signal for a second thread in response to receiving the notification message, and sends the interrupt signal to a processor in which the second thread is located based on an interrupt signal sending manner configured in interrupt configuration information of the PCI device.

Abstract: Implementations of the present specification provide an inter-thread interrupt signal sending method and apparatus. In the inter-thread interrupt signal sending method, a processor in which a first thread is located sends a notification message to a PCI device via a PCI bus by using an MMIO write operation. The MMIO write operation is implemented based on a virtual space address of the first thread to which a memory address of an MMIO memory of the PCI device is mapped. The PCI device generates an interrupt signal for a second thread in response to receiving the notification message, and sends the interrupt signal to a processor in which the second thread is located based on an interrupt signal sending manner configured in interrupt configuration information of the PCI device.

Abstract: Methods and apparatus for live migration for hardware accelerated para-virtualized IO devices. In one aspect, a method is implemented on a host platform including a VMM or hypervisor hosting a VM with a guest OS and a hardware (HW) input/output (TO) device implemented as a para-virtualized IO device with hardware acceleration that is enabled to directly write data into guest memory using a direct memory access (DMA) data path via a HW accelerator. A relayed data path including a software (SW) relay is setup between the HW IO device and a guest IO device driver. During a live migration of the VM, the SW relay tracks memory pages in guest memory being written to by the HW IO device via the DMA data path and logs the memory pages being written to as dirty memory pages. Embodiments may employ Vhost Data Path Acceleration (VDPA) for virtio, as well as other para-virtualization components.