Abstract: A voltage switching device includes a receiver, a voltage controlled switch, a voltage detector and a first switch circuit. The voltage controlled switch is connected between an input data terminal and the receiver. The first voltage generator circuit is configured to provide a first voltage. The voltage detector is configured to output a first logic signal while detecting the first voltage higher than a predetermined voltage. The first switch circuit is connected between the first voltage generator circuit and the voltage controlled switch, the first switch circuit is turned on according to the first logic signal, so that the voltage controlled switch is turned on by the first voltage, and data are transmitted from the input data terminal to the receiver.

Abstract: A liquid crystal composition comprises a photo-polymerizable liquid crystal mixture and a heat-polymerizable liquid crystal mixture, and the two mixtures have opposite rotatory directions. A patterned phase delay film is prepared from the liquid crystal composition. A display device comprises the phase delay film. The preparation of the patterned phase-delay film can be implemented by a two-step polymerization process including UV-polymerization and heat-polymerization. The process is simple and the costs are low.

Abstract: A semiconductor device comprises a fin shaped structure, a shallow trench isolation, a diffusion break structure and a gate electrode. The fin shaped structure is disposed on a substrate. The shallow trench isolation is disposed in the substrate and surrounds the fin shaped structure. The diffusion break structure is disposed in the fin shaped structure, and the gate electrode is disposed across the fin shaped structure.

Abstract: Presented herein are an interconnect and method for forming the same, the method comprising forming an interconnect on a mounting surface of a mounting pad disposed on a first surface of a first substrate, the interconnect comprising a conductive material, optionally solder or metal, the interconnect avoiding the sides of the mounting pad. A molding compound is applied to the first surface of the first substrate and molded around the interconnect to covering at least a lower portion of the interconnect and a second substrate may be mounted on the interconnect. The interconnect may comprise an interconnect material disposed between a first and second substrate and a molding compound disposed on a surface of the first substrate, and exposing a portion of the interconnect. A sidewall of the interconnect material contacts the mounting pad at an angle less than about 30 degrees from a plane perpendicular to the first substrate.

Abstract: The present disclosure provides many different embodiments of a FinFET device that provide one or more improvements over the prior art. In one embodiment, a FinFET includes a semiconductor substrate and a plurality of fins having a first height and a plurality of fin having a second height on the semiconductor substrate. The second height may be less than the first height.

Abstract: A furniture hinge includes an arm member, a casing, an inner link, an outer link, and a resilient device. The arm member includes at least one wall. The at least one wall includes a first mounting structure. The casing can be opened and closed with respect to the arm member. Each of the inner link and the outer link has two end portions respectively and pivotally connected to the arm member and the casing via shafts. The resilient device provides a resilient force acting between the casing and the arm member and includes a second mounting structure to be mounted to the first mounting structure.

Abstract: This application is directed to enabling interaction between computer devices. An application is executed at a first computer device to access Internet-based media content sources and display media items provided thereby on a display device coupled to the first computer device. The first computer device transmits an information item, a plurality of display instructions and a command to a second computer device. The information item includes a selectable display element corresponding to one of the Internet-based media content sources, and the second computer device is configured to select and implement one of the display instructions for displaying the selectable display element of the information item. In response to a user selection of the selectable display item at the second computer device, the first computer device receives the command from the second computer device, and executes the command in relation to the Internet-based media content sources.

Abstract: A multi-axis piezoelectric stress-sensing device, a multi-axis piezoelectric stress-sensing device polarization method, and a piezoelectric sensing detection system thereof are disclosed. The piezoelectric sensing detection system is used for a machining tool. The multi-axis piezoelectric stress-sensing device includes a piezoelectric sensing film, a first electrode, a second electrode, a third electrode, and a fourth electrode. The piezoelectric sensing film has four corners. The first electrode, the second electrode, the third electrode and the fourth electrode are located at the four corners of the piezoelectric sensing film, and at least one electrode is used to polarize another electrode according to at least one polarization direction.

Abstract: The present invention provides methods and compositions for the treatment of ion imbalances using core-shell composites and compositions comprising such core-shell composites. In particular, the invention provides core-shell particles and compositions comprising potassium binding polymers, and core-shell particles and compositions comprising sodium binding polymers, and in each case, pharmaceutical compositions thereof. Methods of use of the polymeric and pharmaceutical compositions for therapeutic and/or prophylactic benefits are also disclosed. The compositions and methods of the invention offer improved approaches for treatment of hyperkalemia and other indications related to potassium ion homeostasis, and for treatment of hypertension and other indicates related to sodium ion homeostasis.

Abstract: A liquid crystal display panel includes a first and a second substrate, scan lines, data lines, pixel structures, a counter electrode layer, and a liquid crystal layer. The scan lines, the data lines, and the pixel structures are located above the first substrate. Each of the pixel structures includes a first active device and a first pixel electrode. The first active device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the first active device and has a plurality of first stripe portions. Two adjacent first stripe portions define a first slit. The first stripe portion has a width L, the first slit has a width S, the first stripe portions have a pitch p there between, and p=L+S. The liquid crystal layer is disposed between the first and second substrates and has a thickness d.

Abstract: The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.

Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.

Abstract: Methods for treating hydrocephalus using a shunt, the shunt having one or more CSF intake openings in a distal portion, a valve disposed in a proximal portion of the shunt, and a lumen extending between the one or more CSF intake openings and the valve, the method comprises deploying the shunt in a body of a patient so that the distal portion of the shunt is at least partially disposed within a CP angle cistern, a body of the shunt is at least partially disposed within an IPS of the patient, and the proximal portion of the shunt is at least partially disposed within or proximate to a JV of the patient, wherein, after deployment of the shunt, CSF flows from the CP angle cistern to the JV via the shunt lumen at a flow rate in a range of 5 ml per hour to 15 ml per hour.

Abstract: Example embodiments include a method that reduces consumption of computer resources in a computer system to reconstruct a shape of a multi-object image using finite terms. The method includes computing an initial function by performing V-system of degree 0 and functions of curves by performing hierarchical V-system. Norms of the functions of curves are compared with a predetermined threshold. A reconstruction function of the shape of the multi-object image is generated by summing the initial function and the functions of curves.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A FinFET includes a fin structure, a gate, a source-drain region and an inter layer dielectric (ILD). The gate crosses over the fin structure. The source-drain region is in the fin structure. The ILD is laterally adjacent to the gate and includes a dopant, in which a dopant concentration of the ILD adjacent to the gate is lower than a dopant concentration of the ILD away from the gate.

Abstract: A method for dynamic frequency scaling (DFS) on the electronic systems level (ESL). The method can run in a virtual environment and dynamically scale the frequency of a virtual component based on a first transaction time and a second transaction time.

Abstract: An RF transmitter with a power combiner and a differential amplifier is provided. The power combiner converts a differential output signal to a single-end output signal and transmits the single-end output signal to the antenna. The differential amplifier includes common-source input transistors, common-gate output transistors and a switch module. The common-source input transistors amplify a differential input signal and output an amplified differential signal. The common-gate output transistors, including sources electrically coupled to the common-source input transistors and drains electrically coupled to the power combiner, generate the differential output signal according to the amplified differential signal. The switch module is electrically coupled between the gates. The switch module electrically couples the gates of the common-gate output transistors if the RF transmitter is in operation and electrically isolates the gates if the RF receiver is in operation.

Abstract: The invention provides a gate driving circuit and a display device. The gate driving circuit is configured to drive a display panel of the display device, and includes shift registers and at least a dummy shift register. The shift registers are respectively configured to generate and output scan signals to scan lines of the display panel, the dummy shift register is configured to generate a dummy scan signal before the scan signals are generated. The dummy scan signal and the scan signals are sequentially generated.

Abstract: A fingerprint sensing unit includes a carrier substrate, a fingerprint sensing chip on an upper surface of the carrier substrate, a molding layer, a light-pervious cover layer on the molding layer, and an adhesive layer between the light-pervious cover layer and the molding layer. The fingerprint sensing chip is electrically connected to the carrier substrate. The molding layer covers the fingerprint sensing chip.