Abstract: A method, computer system, and computer program product are provided for dynamic power saving for wireless access points. It is determined that a wireless client has not requested to connect to a first access point for a first threshold duration of time. Power is disabled to one or more front-end modules of a plurality of front-end modules associated with the first access point except for one designated front-end module that remains powered. Monitoring is performed for an incoming request to connect to the first access point. Power is restored to the one or more front-end modules of the plurality of front-end modules.

Abstract: Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes a first conductive structure, a second conductive structure, a conductive portion coupled to one of the conductive structures, and a memory cell. The memory cell includes different semiconductor portions located on different levels of the apparatus and separated from each other by a dielectric portion. The first semiconductor portion is coupled to the first and second conductive structures. The second semiconductor portion is coupled to the first conductive structure. The memory cell includes a charge storage structure coupled to the second semiconductor portion. The charge storage structure includes multiple portions. Part of the conductive portion is located between portions of the charge storage structure and separated from the charge storage structure by a dielectric material.

Abstract: An implementation for a splay state based on amplitude envelopes in the coupled oscillator system includes introducing a heterogeneous oscillator into the globally coupled identical oscillator network, when the frequency mismatch and repulsive coupling strength of the coupled heterogeneous oscillator system satisfy a certain relationship, the time series of the coupled oscillator will modulate an amplitude envelope, which can realize the generation of splay states between the amplitude envelopes of the identical oscillators except for the heterogeneous oscillator; applying the polar coordinate transformation and perturbation analysis in the condition of small coupling strength, it is easy to obtain the evolution equation of the amplitude envelope from the coupled heterogeneous oscillators. Solving the evolution equation of the amplitude envelope, the average amplitude, amplitude, and other parameters of the amplitude envelope in the splay state can be theoretically determined.

Abstract: The present disclosure is directed to a thermocompression bonding tool having a bond head with a surface for compression and heating and a sensor, a stage for compression and heating, and a controller, and a method for its use for chip gap height and alignment control. For chip gap height and alignment control, the controller is provided with a recipe displacement and temperature profile and measured offsets.

Abstract: The application describes ceDNA vectors having linear and continuous structure for delivery and expression of a transgene. ceDNA vectors comprise an expression cassette flanked by two ITR sequences, where the expression cassette encodes a transgene, e.g., selected from Table 1, encoding a PFIC therapeutic protein (e.g., ATP8B1, ABCB11, ABCB4 or TJP2). Some ceDNA vectors further comprise cis-regulatory elements, including regulatory switches. Further provided herein are methods and cell lines for reliable gene expression of PFIC therapeutic protein in vitro, exvivo and in vivo using the ceDNA vectors. Provided herein are method and compositions comprising ceDNA vectors useful for the expression of PFIC therapeutic protein in a cell, tissue or subject, and methods of treatment of diseases with said ceDNA vectors expressing PFIC therapeutic protein. Such PFIC therapeutic protein can be expressed for treating a subject with Progressive familial intrahepatic cholestasis (PFIC).

Abstract: A neural network system, a method and an apparatus for image compression are provided. The neural network may include a generator including an encoder, an entropy estimator, and a decoder, where the encoder receives an input image and generates an encoder output, a plurality of quantized feature entries are obtained based on the encoder output outputted at a last encoder block, the entropy estimator receives the plurality of quantized feature entries and calculates an entropy loss based on the plurality of quantized feature entries, and the decoder receives the plurality of quantized feature entries and generates a reconstructed image. Furthermore, the neural network may include a discriminator that determines whether the reconstructed image different from the input image based on a discriminator loss. Moreover, the generator may determine whether content of the reconstructed image matches content of the input image based on a generator loss including the entropy loss.

Abstract: A high-electron-mobility transistor structure as well as a fabricating method and use thereof are provided. The high-electron-mobility transistor structure includes an epitaxial structure as well as a source electrode, a drain electrode and a gate electrode, where the epitaxial structure includes a first semiconductor layer and a second semiconductor layer, a carrier channel is formed between the first semiconductor layer and the second semiconductor layer, and the source electrode is electrically connected with the drain electrode through the carrier channel; a coincidence rate between the orthographic projection of the gate foot of the gate electrode on the first semiconductor layer and the orthographic projection of the second semiconductor layer on the first semiconductor layer is more than 80%.

Abstract: A method includes receiving input data including unstructured text representing one or more sequences of terms. For each respective sequence of terms, the method includes generating a corresponding line of therapy (LoT) pseudo-label indicating whether the respective sequence of terms includes LoT information, generating a corresponding LoT indicator predicting whether the respective sequence of terms includes LoT information, and determining a corresponding LoT indication loss based on the corresponding LoT pseudo-label and the corresponding LoT indicator. The method also includes fine-tuning a pre-trained transformer model based on the LoT indication losses determined for the one or more sequences of terms.

Abstract: Provided are an electronic device for wireless communication, a wireless communication method, and a storage medium. The electronic device for wireless communication may comprise a processing circuit. The processing circuit may be configured to interact with a network side device to perform joint channel estimation or joint beam scanning executed in cooperation with other terminal devices in a terminal device group, wherein the terminal devices in the terminal device group have similar channel characteristics. According to at least one aspect of the embodiments of the present disclosure, by means of the similarity of the channel characteristics of the terminal devices in the terminal device group, these terminal devices execute joint channel estimation and/or beam scanning in cooperation with each other rather than perform channel estimation or beam scanning independently, thereby facilitating the reduction of signaling overhead, power consumption and/or time.

Abstract: Material fracture is a process involving both linear elastic stage and nonlinear crack propagation stage. A system includes a physics-informed deep learning model integrated with a discrete simulation model (lattice particle method-LPM) to predict material fracture patterns for arbitrary material microstructures under different loadings. The key idea is to leverage physics-knowledge and data-driven approach for accurate and efficient nonlinear mapping. Physics-knowledge includes constraints, microstructure images, and displacement field from pure linear elastic analysis in a linear stage. A Fully Convolutional Network predicts the final fracture patterns in a non-linear stage. The system exhibits high computational efficiency for the nonlinear stage of material response prediction.

Abstract: Apparatuses, systems, and methods for determining local focus points (LFPs) on a sample are provided. In some embodiments, a controller including circuitry may be configured to cause a system to perform selecting a first plurality of resist pattern designs; performing a plurality of process simulations using the first plurality of resist pattern designs; identifying a hotspot that corresponds to a resist pattern design based on results of the performed process simulations; determining focus-related characteristics that correspond to a plurality of candidate resist patterns, wherein the plurality of candidate resist pattern designs is a subset of the first plurality of resist pattern designs and the subset is selected based on the identified hotspot; and determining locations of a plurality of LFPs based on the generated focus-related characteristics.

Abstract: A memory device comprises an input interface configured to receive an erase request indicating a memory portion to be erased and control circuitry configured to trigger erasing information stored by memory cells of at least a part of the indicated memory portion of the memory device by writing a predefined pattern into the memory cells during an automatic refresh cycle.

Abstract: In an approach, a processor divides a set of data into at least two smaller data blocks. For each of the at least two smaller data blocks, a processor calculates an original value for a data distribution of a respective smaller data block, runs at least two different sampling methods against the respective smaller data block to produce at least two different sets of sample data for the respective smaller data block, calculates respective sampling values for the data distribution of each set of sample data, and selects a set of sample data of the at least two different sets of sample data that has the respective sampling value that is closest to the original value for the respective smaller data block. A processor merges each selected set of sample data for each smaller data block to form a final set of sample data.

Abstract: In a method for video decoding, prediction information of a current block is decoded from a coded video bitstream. The prediction information is indicative of a reference line selected from multiple reference lines and an intra prediction mode selected from a set of potential intra prediction modes that is associated with the reference line. At least one sample of the current block is reconstructed based on the intra prediction mode and at least one reference sample in the reference line. When the reference line is a non-zero reference line, a first set of potential intra prediction modes associated with the non-zero reference line includes a smaller number of potential intra prediction modes compared to a second set of potential intra prediction modes associated with a zero reference line. The first set of potential intra prediction modes only includes most probable modes.

Abstract: A vehicle light module includes a light source assembly, a driving assembly, and a shielding assembly. The driving assembly is connected to the shielding assembly. The light source assembly is configured to send a first beam to the shielding assembly, where the shielding assembly is located on a transmission optical path of the first beam. The driving assembly is configured to drive, according to a driving instruction, the shielding assembly to move, to change a relative position between the shielding assembly and the first beam. A second beam emitted from the shielding assembly is displayed on a path around the vehicle in a target light pattern. The shielding assembly includes at least one movable member, at least a part of the first beam is illuminated on the at least one movable member, and a shape of a cross section of the second beam corresponds to the target light pattern.

Abstract: A method for controlling liquid ingress detection and an electronic device are provided. The method includes: controlling a liquid ingress detection circuit to start liquid ingress detection in a Type-C interface; stopping applying a voltage to first data pins when a detection result of the liquid ingress detection is that liquid ingress occurs in the Type-C interface, and obtaining a first parameter of a screen of the electronic device; when the first parameter of the screen is a screen-off state, controlling the liquid ingress detection circuit to start next liquid ingress detection in the Type-C interface after first duration; and when the first parameter of the screen is a screen-on state, controlling the liquid ingress detection circuit to start next liquid ingress detection in the Type-C interface after second duration, where the first duration is greater than the second duration.

Abstract: A battery cell, a cover assembly, a battery, an electricity-consuming apparatus, a method and a device of manufacturing the battery cell are provided by the present application. The battery cell includes an electrode assembly; a casing accommodating the electrode assembly, in which the casing includes a wall portion, the wall portion includes a stepped hole, the stepped hole includes a first hole segment, a second hole segment and a first stepped face; a sealing member, in which a first sealing interface is formed between the sealing member and the first stepped face, the first sealing interface surrounds the first hole segment, and the sealing member includes a ventilating hole communicating with the first hole segment; a gas-ventilating film including a body and a convex portion, in which the body covers the ventilating hole, a second sealing interface is formed between the body and the sealing member.

Abstract: Provided is a display panel, which comprises an anode layer, a light-emitting functional layer, and a cathode layer, wherein the light-emitting functional layer is disposed on the anode layer and the cathode layer is disposed on the light-emitting functional layer and comprises a plurality of cathode units. Each of the cathode units comprises a first electrode and a second electrode that are insulated from each other, wherein the second electrode is disposed at a periphery of the first electrode.

Abstract: The present disclosure relates to a sensing-memory-computing synergy device, chip and electronic device. The said device comprises: at least one sensing-memory-computing synergy cell, wherein each sensing-memory-computing synergy cell comprises K sensing elements, where the first end of each sensing element is connected to wordline, the second end of each sensing element is connected to bitline, the sensing element can sense changes in external inputs, and K is an integer greater than or equal to zero; a control module which controls the voltages of each wordline and bitline so that the sensing-memory-computing synergy cell can perform desired operations, and sense the voltage or current on bitlines to obtain the operation results. The present embodiment of the disclosure implements the sensing-memory-computing synergy cell by sensing elements, which combines sensing and in-memory computing.

Abstract: Presented are systems and methods for calculating and configuring a random access channel (RACH). A wireless communication device may determine whether a gap is to be present between a pair of adjacent random access channel (RACH) occasions (ROs), for a subcarrier spacing (SCS) of a physical RACH (PRACH) slot that is higher than 120 kiloHertz (KHz) or 60 KHz. The wireless communication device may determine a length of the gap, if the gap is to be present.