Patents by Inventor To Liu

To Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11802808
    Abstract: The present disclosure provides an automatic test system for actual stress of a bridge based on DIC technology, where the system includes a camera, a phosphor spraying device, a computer, and a sliding rail; the sliding rail is arranged on both sides of an upper wing of a box-shaped concrete beam; the phosphor spraying device is used to spray phosphor on a web of the box-shaped concrete beam to form speckles of varying light and shade; the camera is slidably connected to the sliding rail through a bracket, and is used to photograph the speckles and transmit a speckle image to the computer; and the computer is used to analyze and process the speckle image taken by the camera and generate a time history diagram of stress.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: October 31, 2023
    Assignees: JSTI GROUP CO. LTD, NANJING TECH UNIVERSITY
    Inventors: Duo Liu, Jiandong Zhang, Hui Xiong, Xiaonan Feng, Xianqiang Wang, Jun Lu
  • Patent number: 11805677
    Abstract: A display substrate and a manufacturing method thereof, and a display panel are provided. The display substrate includes a base substrate, a first electrode, a light-emitting functional layer, and a second electrode. The light-emitting functional layer includes a first functional layer and a second functional layer, an orthographic projection of an edge of the second functional layer on the base substrate is within an orthographic projection of an edge of the first functional layer on the base substrate, and an area of an orthographic projection of the second functional layer on the base substrate is smaller than an area of an orthographic projection of the first functional layer on the base substrate; and the second electrode covers and is in contact with at least one side surface of the light-emitting functional layer and a portion of a surface of the light-emitting functional layer away from the base substrate.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: October 31, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao Pu, Shengji Yang, Pengcheng Lu, Kuanta Huang, Junbo Wei, Li Liu
  • Patent number: 11803988
    Abstract: A method of adaptive neural image compression with a hyperprior model by meta-learning is performed by at least one processor and includes generating a statistic feature, based on an input image and a hyperparameter, and generating a first shared feature and an estimated adaptive encoding parameter, encoding the input image to obtain a signal encoded image, based on the generated first shared feature and the generated estimated adaptive encoding parameter, generating a second shared feature and an estimated adaptive hyper encoding parameter, generating a hyper feature, based on the signal encoded image, the generated second shared feature, and the generated estimated adaptive hyper encoding parameter, and compressing the obtained signal encoded image, the generated statistic feature, and the generated hyper feature.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: October 31, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Wei Jiang, Wei Wang, Shan Liu, Xiaozhong Xu
  • Patent number: 11804408
    Abstract: A method includes forming a gate structure over fins protruding from a semiconductor substrate; forming an isolation region surrounding the fins; depositing a spacer layer over the gate structure and over the fins, wherein the spacer layer fills the regions extending between pairs of adjacent fins; performing a first etch on the spacer layer, wherein after performing the first etch, first remaining portions of the spacer layer that are within inner regions extending between pairs of adjacent fins have a first thickness and second remaining portions of the spacer layer that are not within the inner regions have a second thickness less than the first thickness; and forming an epitaxial source/drain region adjacent the gate structure and extending over the fins, wherein portions of the epitaxial source/drain region within the inner regions are separated from the first remaining portions of the spacer layer.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: October 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Min Liu, Hsueh-Chang Sung, Yee-Chia Yeo
  • Patent number: 11804435
    Abstract: A semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die includes at least one contact pad and a transistor including a first terminal formed within the active layer. A conduction path can include a plurality of first conduction path portions extending between the first terminal and the at least one contact pad and residing within a footprint of the at least one contact pad.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: October 31, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Yang Liu, Yong Hee Lee, Thomas Obkircher
  • Patent number: 11805653
    Abstract: A memory can have a stacked memory array that can have a plurality of levels of memory cells. Each respective level of memory cells can be commonly coupled to a respective access line. A plurality of drivers can be above the stacked memory array. Each respective driver can have a monocrystalline semiconductor with a conductive region coupled to a respective access line.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: October 31, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Haitao Liu, Kamal M. Karda, Gurtej S. Sandhu, Sanh D. Tang, Akira Goda, Lifang Xu
  • Patent number: 11804575
    Abstract: A manufacturing method of a display panel, a display panel, and a display apparatus. The manufacturing method includes: forming a plurality of backlight units on a process substrate; filling a partition between adjacent backlight units, where a height of the partition relative to the process substrate is greater than a height of the adjacent backlight units relative to the process substrate; preparing a filter layer on a surface of each of the plurality of backlight units away from the process substrate; stripping the backlight units with the filter layer on surfaces of the backlight units from the process substrate, and transferring to a target substrate; and packaging the target substrate.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: October 31, 2023
    Assignee: CHENGDU VISTAR OPTOELECTRONICS CO., LTD.
    Inventors: Yuchun Liu, Chih Yi Hung, Xianrui Qian, Yu Dou, Huimin Li, Chenggong Wang
  • Patent number: 11803043
    Abstract: Apparatuses, systems, and methods for dynamically shaped focal surface with a scanning microscope. A microscope (e.g., a scanning confocal microscope) may use a scanning element to scan an illumination beam to generate a focal region. The scanning element may include multiple degrees of freedom, such as rotation and translation along orthogonal axes. For example, if the illumination beam is a line focus, rotation along a first axis and translation along a second orthogonal axis may sweep the line focus across a focal surface which is substantially flat and normal to the second axis. In some embodiments, the microscope may be a dual-axis handheld microscope, where a single objective in a handheld housing is used to both direct the scanned illumination beam and receive the collected light.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: October 31, 2023
    Assignee: University of Washington
    Inventors: Jonathan T. C. Liu, Lingpeng Wei, Chengbo Yin
  • Patent number: 11802068
    Abstract: The present application relates to a preparation method for recycling inorganic salt in printing and dyeing wastewater and comprises the following process steps: S1, performing impurity removal, softening, COD removal and decoloration on reverse osmosis (RO) membrane concentrated water to obtain pretreated wastewater; S2, performing two-stage electrodialysis on the wastewater obtained in step S1: returning fresh water obtained in a first-stage electrodialysis desalination chamber to a front end of the RO process, and taking saline water obtained in a concentration chamber as raw water of a second-stage electrodialysis desalination chamber and a second-stage electrodialysis concentration chamber; and returning the fresh water obtained by the second-stage electrodialysis desalination chamber to the first-stage electrodialysis concentration chamber; and S3, dealkalizing the concentrated saline water obtained in the step S2 and then adjusting the pH value to obtain concentrated saline water capable of being reuse
    Type: Grant
    Filed: February 6, 2022
    Date of Patent: October 31, 2023
    Assignees: Tiangong University, Zhejiang Jinmo Environmental Technology Co., Ltd
    Inventors: Haitao Wang, Na Chang, Yan Wang, Yinong Xu, Qiliang Wang, Rui Liu, Tieying Jin, Ruhan A, Hao Zhang, Wei Shao, Yanjun Jia
  • Patent number: 11804461
    Abstract: A semiconductor package structure includes a semiconductor device with an active surface, a conductive pillar on the conductive pad, an adhesion strengthening layer, and an encapsulant in contact with the adhesion strengthening layer. The conductive pillar has a side surface and a top surface. The adhesion strengthening layer is conformally disposed on the side surface of the conductive pillar and the active surface of the semiconductor device.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: October 31, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Ping Tsai, Ming-Chi Liu, Yu-Ting Lu, Kai-Chiang Hsu, Che-Ting Liu
  • Patent number: 11805252
    Abstract: Non-power-two-partition tree in video compression is described. In an exemplary aspect, a method for video processing includes determining, for a conversion between a first block of video and a bitstream representation of the first block of video, whether a use of non-power-of-two partition trees (NPT-T) is enabled or disabled, wherein the NPT-T includes splitting the first block to multiple smaller sized child blocks of the first block, and at least one child block's width and/or height have a dimension that is a non-power-of-two integer; and performing the conversion based on the NPT-T in response to the determination that the NPT-T is enabled.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: October 31, 2023
    Assignees: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD, BYTEDANCE INC.
    Inventors: Li Zhang, Kai Zhang, Hongbin Liu, Yue Wang
  • Patent number: 11804169
    Abstract: A pixel driving circuit includes a driving control sub-circuit and a time control sub-circuit. The driving control sub-circuit includes a first driving sub-circuit. The first driving sub-circuit is configured to output a driving signal to drive an element to be driven to operate. The time control sub-circuit includes a second driving sub-circuit. The second driving sub-circuit is configured to output a third voltage signal to make the first driving sub-circuit stop outputting the driving signal, so as to control operating duration of the element to be driven.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: October 31, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Minghua Xuan, Dongni Liu, Qi Qi, Jing Liu, Han Yue
  • Patent number: 11802246
    Abstract: A combination of at least one basic compound, such as potassium hydroxide, together with at least one aldehyde donor can synergistically scavenge mercaptans from organic fluids, such as hydrocarbons, where “synergistically effective” is defined as the amount of mercaptans scavenged is greater as compared with a combination where either the basic compound or the reaction product is absent, used in the same total amount.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: October 31, 2023
    Assignee: BAKER HUGHES OILFIELD OPERATIONS LLC
    Inventors: Peng Jin, Zhengwei Liu, Jerry J. Weers, Sunder Ramchandran, Jagrut Jani, Scott Lehrer, Johnathon Brooks
  • Patent number: 11804196
    Abstract: Provided is a display substrate. The display substrate includes a base substrate, a plurality of gate lines, a plurality of data lines, and a plurality of rows of pixels arranged in an array on the base substrate, and a plurality of shift circuits disposed on the base substrate, wherein in a plurality of pixels connected to each shift circuit, the respective pixels sharing the same data line have the same color, and each shift circuit is connected to one turn-on signal terminal.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: October 31, 2023
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Tengfei Ding, Yang Wang, Shijun Wang, Bo Feng, Jun Fan, Wenkai Mu, Yi Liu, Xinlan Yang, Li Tian
  • Patent number: 11804780
    Abstract: This disclosure provides a multi-mode control method for an active clamp flyback converter. In the flyback converter, the controller realizes mode switching between a trailing edge non-complementary mode, a leading edge non-complementary mode, and a leading edge non-complementary Burst mode of two driving signals after comparing a detection feedback voltage with the set mode switching threshold voltages. The disclosure adopts the trailing edge non-complementary mode to reduce a circulating current of the converter, uses the leading edge non-complementary mode to replace the ordinary flyback mode to improve light load efficiency, and uses the leading-edge non-complementary Burst mode at no-load to limit a peak current of a primary side in leading-edge non-complementary Burst mode to avoid generation of audio noise, and allowing a low no-load power consumption.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 31, 2023
    Assignee: MORNSUN GUANGZHOU SCIENCE & TECHNOLOGY CO., LTD.
    Inventors: Xiangyang Yin, Haizhou Wang, Yuan Yuan, Xiang Liu
  • Patent number: 11805660
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a memory region, the memory region includes a first metal line, a magnetic tunneling junction (MTJ) over the first metal line, a cap, wherein at least a portion of the cap is above the MTJ, a first stop layer above the cap, and a first metal via being disposed over the MTJ and in direct contact with the first stop layer, and a logic region adjacent to the memory region, the logic region includes a second metal line, a third metal line over the second metal line, a second stop layer being disposed over the third metal line, and a second metal via over the third metal line.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: October 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chern-Yow Hsu, Yuan-Tai Tseng, Shih-Chang Liu
  • Patent number: 11805522
    Abstract: Methods, systems, and devices for wireless communications are described in which a first user equipment (UE) may transmit sidelink communications to a second UE, and the second UE may provide feedback associated with the sidelink communication to the first UE in a sidelink control information (SCI) transmission. In some cases, the SCI is first stage SCI transmitted in a sidelink control channel or second stage SCI transmitted in a sidelink shared channel. The feedback may include one or more of acknowledgment/negative-acknowledgment feedback, channel state information feedback, a scheduling request, or any combinations thereof. In some cases, the first UE may indicate resources of the second slot to the second UE for transmission of the feedback in the SCI, such as by providing a time offset value and resource index that identifies the resources.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: October 31, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Chih-Hao Liu, Yisheng Xue, Lik Hang Silas Fong, Jing Sun, Xiaoxia Zhang, Xiaojie Wang, Jung Ho Ryu, Tao Luo
  • Patent number: D1003219
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: October 31, 2023
    Inventor: Yanfeng Liu
  • Patent number: D1003327
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 31, 2023
    Assignee: Hiwin Technologies Corp.
    Inventors: Jonus Liu, Jheng-Fu Huang, Yi-Chan Tseng, Shou-Yang Huang
  • Patent number: D1003359
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: October 31, 2023
    Assignee: Guangzhou Jintong International Trade Co., Ltd.
    Inventor: Jianping Liu